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* freedreno/a3xx/compiler: add TGSI_OPCODE_ABSRob Clark2013-06-211-6/+14
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx/compiler: add TGSI_OPCODE_DPHRob Clark2013-06-211-3/+18
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx/compiler: fix for replicating instructionsRob Clark2013-06-211-24/+18
| | | | | | | | | | | | | | If we are accumulating result into tmp.x, and need a mov to final destination, we want to move the .x component into all of the components enabled from the read dest's writemask, ie. we want: MOV dst.xyzw tmp.xxxx rather than: MOV dst.xyzw tmp.xyzw Signed-off-by: Rob Clark <[email protected]>
* trace: Don't dump texture transfers.José Fonseca2013-06-213-10/+19
| | | | | Huge trace files with little value. Reviewed-by: Brian Paul <[email protected]>
* ilo: replace a boolean by boolChia-I Wu2013-06-201-1/+1
| | | | bool is used internally. This is just cosmetic.
* ilo: rename cache_seqno to uploadedChia-I Wu2013-06-202-6/+6
| | | | It has been used as a bool since shader cache rework.
* llvmpipe: use 64bit counter for occlusion queriesRoland Scheidegger2013-06-193-5/+10
| | | | | | | Some APIs require 64bit and at least for 64bit archs the overhead should be minimal. Reviewed-by: Jose Fonseca <[email protected]>
* llvmpipe: handle more queriesRoland Scheidegger2013-06-197-14/+67
| | | | | | | | | | | Handle PIPE_QUERY_GPU_FINISHED and PIPE_QUERY_TIMESTAMP_DISJOINT, and also fill out the ps_invocations and c_primitives from the PIPE_QUERY_PIPELINE_STATISTICS (the others in there should already be handled). Note that ps_invocations isn't pixel exact, just 16 pixel exact but I guess it's better than nothing. Doesn't really seem to work correctly but there's probably bugs elsewhere. Reviewed-by: Jose Fonseca <[email protected]>
* softpipe: handle all queries, and change for the new disjoint semanticsRoland Scheidegger2013-06-191-11/+28
| | | | | | | | The driver can do render_condition but wasn't handling the occlusion and so_overflow predicates (though the latter might not work yet due to gs support). Reviewed-by: Jose Fonseca <[email protected]>
* gallium: fix PIPE_QUERY_TIMESTAMP_DISJOINTRoland Scheidegger2013-06-192-8/+6
| | | | | | | | | | | The semantics didn't really make sense, not really matching neither d3d9 (though the docs are all broken there) nor d3d10. So make it match d3d10 semantics, which actually gives meaning to the "disjoint" part. Drivers are fixed up in a very primitive way, I have no idea what could actually cause the counter to become unreliable so just always return FALSE for the disjoint part. Reviewed-by: Jose Fonseca <[email protected]>
* trace: Dump pipe_rasterizer_state::clip_halfz.José Fonseca2013-06-191-0/+1
| | | | Trivial.
* svga: add some comments about primitive conversionBrian Paul2013-06-192-11/+26
| | | | | | | And clean up the svga_translate_prim() function with better variable names. Reviewed-by: Jose Fonseca <[email protected]>
* svga: reindent svga_tgsi.cBrian Paul2013-06-191-63/+65
| | | | Reviewed-by: Jose Fonseca <[email protected]>
* svga: whitespace, comment, formatting fixes in svga_tgsi_emit.hBrian Paul2013-06-191-42/+56
| | | | Reviewed-by: Jose Fonseca <[email protected]>
* svga: move some svga/tgsi functionsBrian Paul2013-06-193-125/+149
| | | | | | | | Move some functions from the svga_tgsi_insn.h header into the svga_tgsi_insn.c file since they're only used there. Plus, add comments and fix formatting. Reviewed-by: Jose Fonseca <[email protected]>
* svga: formatting fixes in svga_tgsi_insn.cBrian Paul2013-06-191-260/+395
| | | | Reviewed-by: Jose Fonseca <[email protected]>
* nvc0: kill assert in ppp codeMaarten Lankhorst2013-06-191-2/+0
| | | | | It's no longer always true, and the video tilign aligment should ensure the alignment is handled correctly regardless.
* ilo: rework shader cacheChia-I Wu2013-06-199-186/+356
| | | | | | | | | The new code makes the shader cache manages all shaders and be able to upload all of them to a caller-provided bo as a whole. Previously, we uploaded only the bound shaders. When a different set of shaders is bound, we had to allocate a new kernel bo to upload if the current one is busy.
* nv50: avoid crash on updating RASTERIZE_ENABLE stateEmil Velikov2013-06-191-0/+10
| | | | | | | | When doing blit using the 3D engine, the rasterizer cso may be NULL. Ported from nvc0 commit 8aa8b0539. Signed-off-by: Emil Velikov <[email protected]>
* Revert "draw: clear the draw buffers in draw"Zack Rusin2013-06-176-9/+10
| | | | | | | | | | | This reverts commit 41966fdb3b71c0b70aeb095e0eb3c5626c144a3a. While it's a lot cleaner it causes regressions because the draw interface is always called from the draw functions of the drivers (because the buffers need to be mapped) which means that the stream output buffers endup being cleared on every draw rather than on setting. Signed-off-by: Zack Rusin <[email protected]>
* llvmpipe: fixes for conditional renderingRoland Scheidegger2013-06-184-36/+86
| | | | | | | | | | honor render_condition for clear_render_target and clear_depth_stencil. Also add minimal support for occlusion predicate, though it can't be active at the same time as an occlusion query yet. While here also switchify some large if-else (actually just mutually exclusive if-if-if...) constructs. Reviewed-by: Jose Fonseca <[email protected]>
* gallium: add condition parameter to render_conditionRoland Scheidegger2013-06-1831-23/+60
| | | | | | | | | | | | | For conditional rendering this makes it possible to skip rendering if either the predicate is true or false, as supported by d3d10 (in fact previously it was sort of implied skip rendering if predicate is false for occlusion predicate, and true for so_overflow predicate). There's no cap bit for this as presumably all drivers could do it trivially (but this patch does not implement it for the drivers using true hw predicates, nvxx, r600, radeonsi, no change is expected for OpenGL functionality). Reviewed-by: Jose Fonseca <[email protected]>
* ilo: construct depth/stencil command in create_surface()Chia-I Wu2013-06-186-271/+368
| | | | | | | | | | Add ilo_gpe_init_zs_surface() to construct 3DSTATE_DEPTH_BUFFER 3DSTATE_STENCIL_BUFFER 3DSTATE_HIER_DEPTH_BUFFER at surface creation time. This allows fast state emission in draw_vbo().
* gallium: replace bswap_32 calls with util_bswap32Jonathan Gray2013-06-174-9/+7
| | | | | | | | | byteswap.h and bswap_32 aren't portable, replace them with calls to gallium's util_bswap32 as suggested by Mark Kettenis. Lets these files build on OpenBSD. Signed-off-by: Jonathan Gray <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* draw: clear the draw buffers in drawZack Rusin2013-06-176-10/+9
| | | | | | | | | | Moves clearing of the draw so target buffers to the draw module. They had to be cleared in the drivers before which was quite messy. Signed-off-by: Zack Rusin <[email protected]> Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* ilo: add pipe-based copy method to ilo_blitterChia-I Wu2013-06-172-5/+25
| | | | It enables accelerated resource_copy_region() when blt-based method fails.
* ilo: add BLT-based blitting methods to ilo_blitterChia-I Wu2013-06-174-495/+847
| | | | | | Port BLT code in ilo_blit.c to BLT-based blitting methods of ilo_blitter. Add BLT-based clears. The latter is verifed with util_clear(), but it is not in use yet.
* ilo: replace util_blitter by ilo_blitterChia-I Wu2013-06-177-103/+363
| | | | | ilo_blitter is just a wrapper for util_blitter for now. We will port BLT code to ilo_blitter shortly.
* ilo: fix for half-float vertex arraysChia-I Wu2013-06-151-1/+14
| | | | | Commit 6fe0453c339b6e894e0ee8d2200e7638a43ed21e broke half-float vertex arrays. This reverts a part of that commit, and explains why.
* ilo: add some assertions to help debuggingChia-I Wu2013-06-141-1/+23
| | | | | | Assert that we do not support user vertex/index/constant buffers. Issue a warning when a sampler view is created for a resource without PIPE_BIND_SAMPLER_VIEW.
* ilo: silence a compiler warningChia-I Wu2013-06-141-0/+2
| | | | The path should never be hit.
* ilo: mapping a resource may make some states dirtyChia-I Wu2013-06-134-9/+112
| | | | | | | | | When a resource is busy and is mapped with PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE, the underlying bo is replaced. We need to mark states affected by the resource dirty. With this change, we no longer have to emit vertex buffers and index buffer unconditionally.
* ilo: bump up PIPE_CAP_GLSL_FEATURE_LEVEL to 140Chia-I Wu2013-06-131-1/+1
| | | | With UBO and TBO support, we are supposedly good to claim GLSL 1.40.
* ilo: initialize dirty flags in ilo_init_states()Chia-I Wu2013-06-132-2/+2
| | | | | Now that we have a function to initialize states, initialize dirty flags there too.
* ilo: re-emit states that involve resourcesChia-I Wu2013-06-134-21/+23
| | | | | | | Even with hardware contexts, since we do not pin resources, we have to re-emit the states so that the resources are referenced (by cp->bo) and their offsets are updated in case they are moved. This also allows us to elimiate cp flush in is_bo_busy().
* ilo: fix for util_blitter_clear() changesChia-I Wu2013-06-131-4/+1
| | | | It has been broken since 17350ea979b883662573dac136cd9efb49938210.
* r600g: upsample and downsample MSAA resources for transfersMarek Olšák2013-06-131-79/+141
| | | | | | | | | | | We did downsample (=resolve) MSAA resources to make ReadPixels work with MSAA GLX visuals, which was enough for read-only color-only transfers. This commit makes write color transfers and depth-stencil transfers work in a similar manner. It does downsampling in transfer_map and upsampling in transfer_unmap. Reviewed-by: Brian Paul <[email protected]>
* gallium/u_blitter: make clearing independent of the colorbuffer formatMarek Olšák2013-06-133-6/+3
| | | | | | | There isn't any difference between 32_FLOAT and 32_*INT in vertex fetching. Both of them don't do any format conversion. Reviewed-by: Brian Paul <[email protected]>
* gallium/u_blitter: make clearing independent of the number of bound colorbuffersMarek Olšák2013-06-133-3/+2
| | | | | | We can use the fragment shader TGSI property WRITES_ALL_CBUFS. Reviewed-by: Brian Paul <[email protected]>
* util: new util_fill_box helperRoland Scheidegger2013-06-131-29/+25
| | | | | | | | | Use new util_fill_box helper for util_clear_render_target. (Also fix off-by-one map error.) v2: handle non-zero z correctly in new helper Reviewed-by: Jose Fonseca <[email protected]>
* ilo: update winsys interfaceChia-I Wu2013-06-121-7/+14
| | | | | | The motivation is to kill tiling and pitch in struct intel_bo. That requires us to make tiling and pitch not queryable, and be passed around as function parameters.
* ilo: get rid of function tables in winsysChia-I Wu2013-06-1214-90/+88
| | | | | We are moving toward making struct intel_bo alias drm_intel_bo. As a first step, we cannot have function tables.
* ilo: access bo size directlyChia-I Wu2013-06-121-2/+2
| | | | buf->bo_size is readily avaiable, no need to go via buf->bo->get_size().
* ilo: remove unnecessary tex_set_bo/buf_set_boChia-I Wu2013-06-121-42/+18
| | | | Merge the bodies to tex_create_bo/buf_create_bo respectively.
* nvc0: fix up video buffer alignment requirementsMaarten Lankhorst2013-06-081-5/+3
| | | | Signed-off-by: Maarten Lankhorst <[email protected]>
* freedreno: better scissor fixRob Clark2013-06-085-28/+43
| | | | | | Actually respect rasterizer state. Signed-off-by: Rob Clark <[email protected]>
* freedreno: gmem bypassRob Clark2013-06-087-30/+168
| | | | | | | | | | | | | The GPU (at least a3xx, but I think also a2xx) can render directly to memory, bypassing tiling. Although it can't do this if blend, depth, and a few other features of the pipeline are enabled. This direct memory mode can be faster for some sorts of operations, such as simple blits. In particular, this significantly speeds up XA by avoiding to pull the entire dest pixmap into GMEM, render tiles, and write it all back out again. This should also speed up resource copy-region and blit. Signed-off-by: Rob Clark <[email protected]>
* freedreno: add a3xx supportRob Clark2013-06-0835-3/+8955
| | | | | | | | | | | | | | | | | | | | The adreno a3xx GPU is found in newer snapdragon devices, such as the nexus4. The a3xx is GLESv3 and OpenCL capable, although that is not enabled yet in gallium. Compared to a2xx, it introduces an entirely new unified shader ISA, and re-shuffles all or nearly all of the registers. The good news is that (for the most part) the registers are more orthogonal, not combining unrelated state in a single register. And that there is a lot more flexibility, so we don't need to patch and re-emit the shader like we did on a2xx. The shader compiler is currently quite dumb, there would be a lot of room for improvement with an optimizing pass. Despite that, with the a320 in my nexus4 it seems to be ~2-3x faster compared to the a220 in my HP touchpad. Signed-off-by: Rob Clark <[email protected]>
* freedreno: prepare for a3xxRob Clark2013-06-0849-2008/+2798
| | | | | | | | Split the parts that are specific to adreno a2xx series GPUs from the parts that will be in common with a3xx, so that a3xx support can be added more cleanly. Signed-off-by: Rob Clark <[email protected]>
* llvmpipe: move create_surface/destroy_surface functions to lp_surface.cRoland Scheidegger2013-06-072-59/+59
| | | | | | | Believe it or not but these two are actually the first two functions which really belong in this file nowadays. Reviewed-by: Brian Paul <[email protected]>
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