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* radeonsi: rename cache flushing flags once moreMarek Olšák2015-11-137-35/+30
* radeonsi: set the DISABLE_WR_CONFIRM flag on CI-VI as wellMarek Olšák2015-11-131-2/+2
* radeonsi: initialize SX_PS_DOWNCONVERT to 0 on StoneyMarek Olšák2015-11-131-0/+3
* radeonsi: add glClearBufferSubData accelerationMarek Olšák2015-11-131-0/+60
* radeonsi: add SI_SAVE_FRAGMENT_STATE blitter flagMarek Olšák2015-11-131-19/+25
* radeonsi: fix a future crash in emit_cb_target_maskMarek Olšák2015-11-131-1/+1
* radeonsi: fix unaligned clear_buffer fallbackMarek Olšák2015-11-131-6/+8
* r600g: fix clear_buffer fallback with offset != 0Marek Olšák2015-11-131-0/+1
* gallium/radeon: fix PIPE_QUERY_GPU_FINISHEDMarek Olšák2015-11-131-1/+1
* nvc0/ir: add support for TGSI_SEMANTIC_HELPER_INVOCATIONIlia Mirkin2015-11-126-0/+6
* nv50,nvc0: add ARB_clear_texture supportIlia Mirkin2015-11-115-7/+101
* gallium: add PIPE_CAP_CLEAR_TEXTURE and clear_texture prototypeIlia Mirkin2015-11-1114-0/+14
* r600: initialised PGM_RESOURCES_2 for ES/GSDave Airlie2015-11-122-0/+6
* r600g: Pass conservative depth parameters to hwGlenn Kennard2015-11-117-1/+53
* Revert "r600g: Pass conservative depth parameters to hw"Dave Airlie2015-11-116-46/+0
* r600g: Implement ARB_texture_viewGlenn Kennard2015-11-112-7/+18
* r600g: Pass conservative depth parameters to hwGlenn Kennard2015-11-116-0/+46
* vc4: Avoid loading undefined (newly-allocated) FBO contents.Eric Anholt2015-11-091-0/+17
* vc4: Return NULL when we can't make our shadow for a sampler view.Eric Anholt2015-11-091-0/+4
* vc4: Return GL_OUT_OF_MEMORY when buffer allocation fails.Eric Anholt2015-11-092-19/+32
* vc4: Add CL dumping for GL_ARRAY_PRIMITIVE.Eric Anholt2015-11-091-1/+16
* vc4: Fix a compiler warning.Eric Anholt2015-11-091-1/+1
* nvc0: enable compute support on FermiSamuel Pitoiset2015-11-081-2/+2
* nv50/ir: fix emission of s[] args in certain situationsIlia Mirkin2015-11-071-2/+2
* nv50/ir: only take abs value when computing high resultIlia Mirkin2015-11-071-1/+1
* nouveau: avoid queueing too much work onto a single fenceIlia Mirkin2015-11-072-26/+43
* llvmpipe: disable front updates for nowDave Airlie2015-11-081-1/+1
* radeonsi: add register definitions for StoneyMarek Olšák2015-11-071-0/+322
* radeonsi: add workarounds for CP DMA to stay on the fast pathMarek Olšák2015-11-071-5/+88
* radeonsi: unify CP DMA preparation logicMarek Olšák2015-11-071-37/+34
* radeonsi: unify CP DMA code determining various flagsMarek Olšák2015-11-071-28/+23
* radeonsi: only enable write confirmation on the last CP DMA packetMarek Olšák2015-11-071-2/+4
* nv50/ir: allow emission of immediates in imul/imad opsIlia Mirkin2015-11-071-2/+8
* nv50/ir: properly set the type of the constant folding resultIlia Mirkin2015-11-061-4/+4
* nv50/ir: add support for const-folding OP_CVT with F64 source/destIlia Mirkin2015-11-063-0/+45
* nv50/ir: add fp64 opcode emission support for G200 (NVA0)Ilia Mirkin2015-11-061-10/+84
* nv50/ir: Add support for 64bit immediates to checkSwapSrc01Hans de Goede2015-11-061-5/+6
* nvc0/ir: Teach insnCanLoad about double immediatesHans de Goede2015-11-061-6/+19
* nv50/ir: Add support for merge-s to the ConstantFolding passHans de Goede2015-11-061-0/+15
* nv50/ir: disallow 64-bit immediates on nv50 targetsIlia Mirkin2015-11-061-1/+1
* nv50/ir: allow movs with TYPE_F64 destinations to be splitIlia Mirkin2015-11-061-0/+6
* gm107/ir: Add support for double immediatesHans de Goede2015-11-061-1/+4
* nvc0/ir: Add support for double immediatesHans de Goede2015-11-061-0/+8
* radeon/uvd: fix VC-1 simple/main profile decode v2Boyuan Zhang2015-11-062-2/+7
* freedreno/a4xx: fix blend colorRob Clark2015-11-061-5/+9
* freedreno: update generated headersRob Clark2015-11-066-43/+54
* freedreno: add a305 supportGuillaume Charifi2015-11-061-0/+1
* freedreno/ir3: Use nir_foreach_variableBoyan Ding2015-11-061-3/+3
* nvc0: reintroduce BGRA4 format supportIlia Mirkin2015-11-062-3/+1
* llvmpipe: disable texture cacheRoland Scheidegger2015-11-051-1/+1
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