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* ilo: remove intel_winsys_enable_reuse()Chia-I Wu2014-03-101-2/+0
| | | | It should be an (winsys) implementation detail.
* radeonsi: Use proper member name for deleting export shader PM4 stateMichel Dänzer2014-03-101-0/+2
| | | | | | Fixes double-free with some piglit tests using geometry shaders. Reviewed-by: Marek Olšák <[email protected]>
* r600g: document why texture offset emulation is neededMarek Olšák2014-03-101-1/+2
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* Revert nvc0 part of "nv50: adjust blit_3d handling of ms output textures"Ilia Mirkin2014-03-091-8/+4
| | | | | | | | The nvc0 bits don't appear to work, and I thought I had removed them from the commit. Oops. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.0 10.1" <[email protected]>
* nv50: adjust blit_3d handling of ms output texturesIlia Mirkin2014-03-092-8/+16
| | | | | | | | This fixes some unwanted scaling when the output is multisampled. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Christoph Bumiller <[email protected]> Cc: "10.0 10.1" <[email protected]>
* nouveau: fix fence waiting logic in screen destroyIlia Mirkin2014-03-093-7/+27
| | | | | | | | | | | | nouveau_fence_wait has the expectation that an external entity is holding onto the fence being waited on, not that it is merely held onto by the current pointer. Fixes a use-after-free in nouveau_fence_wait when used on the screen's current fence. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75279 Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Christoph Bumiller <[email protected]> Cc: "9.2 10.0 10.1" <[email protected]>
* nouveau: add valid range tracking to nouveau_bufferIlia Mirkin2014-03-096-0/+47
| | | | | | | | | This logic is borrowed from the radeon code. The transfer logic will only get called for PIPE_BUFFER resources, so it shouldn't be necessary to worry about them becoming render targets. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Christoph Bumiller <[email protected]>
* radeonsi: fix freeing descriptor buffersChristian König2014-03-081-1/+1
| | | | | | | | That structure member is a pointer, so the loop with the Elements macro only freed up the first entry. Signed-off-by: Christian König <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: fix leaking the bound state on destruction v2Christian König2014-03-083-0/+10
| | | | | | | v2: rebased on stale pointer fixes Signed-off-by: Christian König <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: avoid stale state pointersChristian König2014-03-081-9/+3
| | | | | Signed-off-by: Christian König <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: avoid stale pointers in si_delete_shader_selectorChristian König2014-03-081-1/+6
| | | | | Signed-off-by: Christian König <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeon/vce: fix memory leakChristian König2014-03-081-0/+1
| | | | | Signed-off-by: Christian König <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeon: Include radeon_elf_util.c in the list of LLVM_C_FILES v2Tom Stellard2014-03-072-1/+2
| | | | | | | | | | | | | | | | | This fixes the a build breakage caused by 6974eb907600b9d0176d3158ff0fd30ac3e56a55 on build configurations where all the following are true: 1. radeonsi is not being built 2. r600g is being built 3. opencl is disabled 4. --enable-r600-llvm-compiler is not being used 5. libelf is not installed v2: - Add $(RADEON_CFLAGS) to libllvmradeon_la_CFLAGS Tested-by: Brian Paul <[email protected]>
* radeon/llvm: Factor elf parsing code out into its own functionTom Stellard2014-03-074-51/+132
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeon: Rename struct radeon_llvm_binary to radeon_shader_binary v2Tom Stellard2014-03-075-12/+23
| | | | | | | | | | And move its definition into r600_pipe_common.h; This struct is a just a container for shader code and has nothing to do with LLVM. v2: - Drop unrelated Makefile change Reviewed-by: Michel Dänzer <[email protected]>
* gallium: rename R4A4 and A4R4 formats to match their swizzleMarek Olšák2014-03-071-1/+1
| | | | | | Like L4A4. Reviewed-by: Brian Paul <[email protected]>
* radeonsi: fix blit compressed texture workaround to support 2D arraysMarek Olšák2014-03-071-1/+2
| | | | | | We don't have a piglit test for this, but I think it's correct. Reviewed-by: Michel Dänzer <[email protected]>
* r600g: fix blitting the last 2 mipmap levels for EvergreenMarek Olšák2014-03-073-13/+36
| | | | | | | | This fixes a lot of compressedteximage piglit tests. R600-R700 don't have this issue. Cc: [email protected]
* r600g: fix texelFetchOffset GLSL functionsMarek Olšák2014-03-071-10/+77
| | | | Cc: [email protected]
* radeon: Use upload manager for buffer downloadsNiels Ole Salscheider2014-03-071-18/+56
| | | | | | | Using DMA for reads is much faster. Signed-off-by: Niels Ole Salscheider <[email protected]> Signed-off by: Marek Olšák <[email protected]>
* WIP: freedreno/a3xx: incorrect scissor for binning passRob Clark2014-03-053-8/+35
| | | | | | | | | | | | | If scissor optimization is used (to avoid bringing scissored portions of the render target into GMEM and then back out to system memory) in combination with hw binning pass, the result would be a scissor mismatch between binning pass and rendering pass. This would cause rendering bugs in some scenarios with (for example) gnome-shell. I would have expected that simply using the correct screen-scissor during the binning pass would be enough, but seems like there is something else missing. So for now disable binning pass if scissor optimization is used.
* nv50,nvc0: add 11f_11f_10f vertex supportIlia Mirkin2014-03-043-1/+3
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* radeon/uvd: fix typo in documentationDieter Nützel2014-03-041-1/+1
| | | | | | s/grap/grab/ Signed-off-by: Alex Deucher <[email protected]>
* r600g: implement edge flagsMarek Olšák2014-03-043-4/+53
| | | | | Cc: [email protected] Reviewed-by: Alex Deucher <[email protected]>
* r600g: port color buffer format conversion from radeonsiMarek Olšák2014-03-044-913/+161
| | | | | | | | | | | | r600_translate_colorformat is rewritten to look like radeonsi. r600_translate_colorswap is shared with radeonsi. r600_colorformat_endian_swap is consolidated. This adds some formats which were missing. Future "plain" formats will automatically be supported. Cc: [email protected] Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: move translate_colorswap to common codeMarek Olšák2014-03-044-54/+62
| | | | | | | Also translate the Y__X swizzle. Cc: [email protected] Reviewed-by: Alex Deucher <[email protected]>
* softpipe: use 64-bit arithmetic in softpipe_resource_layout()Brian Paul2014-03-031-3/+3
| | | | | | | | To avoid 32-bit integer overflow for large textures. Note: we're already doing this in llvmpipe. Cc: "10.0" "10.1" <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* freedreno/a3xx/compiler: overflow in trans_endifRob Clark2014-03-021-13/+5
| | | | | | | | The logic to count number of block outputs was out of sync with the actual array construction. But to simplify / make things less fragile, we can just allocate the arrays for worst case size. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx/compiler: fix for resolving PHI'sRob Clark2014-03-021-18/+33
| | | | | | | A value may be assigned on only one side of an if/else. In this case we can simply substitute a mov.f32f32. Signed-off-by: Rob Clark <[email protected]>
* freedreno/lowering: two-sided-colorRob Clark2014-03-025-57/+269
| | | | | | | | | Add option to generate fragment shader to emulate two sided color. Additional inputs are added to shader for BCOLOR's (on corresponding to each COLOR input). CMP instructions are used to select whether to use COLOR or BCOLOR. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx/compiler: add SSGRob Clark2014-03-022-0/+2
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: fix gl_PointSizeRob Clark2014-03-025-13/+20
| | | | | | | If vertex writes pointsize, there are a few extra bits we need to turn on in the cmdstream here and there. Signed-off-by: Rob Clark <[email protected]>
* freedreno: resync generated headersRob Clark2014-03-024-5/+7
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: binning-pass vertex shader variantRob Clark2014-03-023-18/+57
| | | | | | | | | | | Now that we have the infrastructure for shader variants, add support to generate an optimized shader for hw binning pass (with varyings/outputs other than position/pointsize removed). This exposes the possibility that the shader uses fewer constants than what is bound, so we have to take care to not emit consts beyond what the shader uses, lest we provoke the wrath of the HLSQ lockup! Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: add support for frag coord/faceRob Clark2014-03-027-123/+408
| | | | | | | Fixes anything that tries to use gl_FrontFacing/gl_FragCoord. Also, face support is needed to emulate two sided color. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: fix for unused inputsRob Clark2014-03-022-5/+11
| | | | | | | An unused input might not have a register assigned. We don't want bogus regid to result in impossibly high max_reg.. Signed-off-by: Rob Clark <[email protected]>
* r300g/tests: Added missing fclose for FILE resource.Siavash Eliasi2014-02-281-0/+3
| | | | | Reviewed-by: Tom Stellard <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* r600g/compute: PIPE_CAP_COMPUTE should be false for pre-evergreen GPUsTom Stellard2014-02-281-1/+3
| | | | | | | | | This prevents clover from using unsupported devices. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Alex Deucher <[email protected]> CC: "10.0 10.1" <[email protected]>
* nouveau: add a nouveau_compiler binary to compile TGSI into shader ISAIlia Mirkin2014-02-263-0/+235
| | | | | | | This makes it easy to compare output between different cards, especially for ones that you don't have (and/or not in the current machine). Signed-off-by: Ilia Mirkin <[email protected]>
* nv30: remove nv30_context use from nvfx_*progIlia Mirkin2014-02-2613-107/+110
| | | | | | | This should pave the way to being able to use the compiler without a context. Also leads to cleaner code. Signed-off-by: Ilia Mirkin <[email protected]>
* nv30: remove unused sprite flipping parameterIlia Mirkin2014-02-263-5/+3
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nv30: remove unused render_mode and hw_pointsprite_controlIlia Mirkin2014-02-262-8/+3
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nv30: remove use_nv4x, it is identical to is_nv4xIlia Mirkin2014-02-264-16/+14
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* radeonsi: Prevent geometry shader from emitting too many verticesMichel Daenzer2014-02-271-0/+16
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* ilo: create u_upload_mgr lastChia-I Wu2014-02-261-8/+11
| | | | | Similar to u_blitter, u_upload_mgr is now a client of the pipe context. Its creation needs to be delayed until the context has been (almost) initialized.
* nv50: enable txg where supportedIlia Mirkin2014-02-253-2/+8
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nv50: enable cube map array texture supportIlia Mirkin2014-02-253-9/+7
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* r600g,radeonsi: consolidate create_surface and surface_destroyMarek Olšák2014-02-256-85/+63
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: inline util_blitter_copy_textureMarek Olšák2014-02-251-3/+21
| | | | | | | | This will be used for changing texture properties without modifying pipe_resource like r600g, but not in this series. For now, this change allows consolidation of pipe_surface functions. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: remove useless psbox variable from resource_copy_regionMarek Olšák2014-02-251-3/+2
| | | | Reviewed-by: Michel Dänzer <[email protected]>
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