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path: root/src/gallium/drivers/virgl
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* virgl: fix readback with pending transfersChia-I Wu2019-05-291-6/+26
* virgl: remove an incorrect check in virgl_res_needs_flushChia-I Wu2019-05-241-15/+0
* virgl: reemit resources on first draw/clear/computeChia-I Wu2019-05-241-6/+24
* virgl: add missing emit_res for SO targetsChia-I Wu2019-05-241-2/+8
* gallium: Change PIPE_CAP_TGSI_FS_FBFETCH bool to PIPE_CAP_FBFETCH countKenneth Graunke2019-05-231-2/+3
* virgl: track valid buffer range for transfer syncChia-I Wu2019-05-227-20/+59
* virgl: remove support for buffer surfacesChia-I Wu2019-05-222-19/+15
* virgl: handle NULL shader resource explicitlyChia-I Wu2019-05-221-3/+3
* virgl: handle DONT_BLOCK and MAP_DIRECTLYChia-I Wu2019-05-154-7/+45
* virgl: add virgl_resource_transfer_prepareChia-I Wu2019-05-154-55/+49
* virgl: honor DISCARD_WHOLE_RESOURCE in virgl_res_needs_readbackChia-I Wu2019-05-151-1/+2
* virgl: clean up virgl_res_needs_readbackChia-I Wu2019-05-151-5/+16
* virgl: clean up virgl_res_needs_flushChia-I Wu2019-05-141-2/+34
* virgl: comment on a sync issue in transfersChia-I Wu2019-05-142-0/+20
* virgl: PIPE_TRANSFER_READ does not imply flushChia-I Wu2019-05-141-4/+1
* virgl: do not skip readback because of explicit flushChia-I Wu2019-05-141-3/+0
* virgl: remove unused virgl_transfer_inline_writeChia-I Wu2019-05-142-42/+0
* gallium: Redefine the max texture 2d cap from _LEVELS to _SIZE.Eric Anholt2019-05-131-3/+3
* virgl: do not use inline writes for subdataChia-I Wu2019-05-061-4/+7
* virgl: rework queriesChia-I Wu2019-05-061-45/+71
* virgl: export resource_is_busy from winsysChia-I Wu2019-05-061-0/+2
* virgl: Re-use and extend queue transfers for intersecting buffer subdatas.David Riley2019-05-011-0/+46
* virgl: Allow transfer queue entries to be found and extended.David Riley2019-05-012-0/+58
* virgl: Store mapped hw resource with transfer object.David Riley2019-05-013-7/+7
* virgl: skip empty cmdbufsChia-I Wu2019-04-232-0/+9
* virgl: clear vertex_array_dirtyChia-I Wu2019-04-221-0/+2
* virgl: wait after a flushGurchetan Singh2019-04-183-6/+12
* virgl: document potentially failing blitErik Faye-Lund2019-04-171-0/+6
* virgl: do color-conversion during when mapping transferErik Faye-Lund2019-04-171-10/+70
* virgl: only blit if resource is readErik Faye-Lund2019-04-171-2/+5
* virgl: get readback-formats from hostErik Faye-Lund2019-04-173-0/+44
* virgl: make sure bind is set for non-buffersErik Faye-Lund2019-04-171-0/+3
* virgl: support write-back with staged transfersErik Faye-Lund2019-04-172-22/+49
* virgl: use pipe_box for blit dst-rectErik Faye-Lund2019-04-171-5/+12
* virgl: rewrite core of virgl_texture_transfer_mapErik Faye-Lund2019-04-171-36/+58
* virgl: return error if allocating resolve_tmp failsErik Faye-Lund2019-04-171-0/+4
* virgl: wait for the right resourceErik Faye-Lund2019-04-171-1/+1
* virgl: check for readback on correct resourceErik Faye-Lund2019-04-171-1/+1
* virgl: make unmap queuing a bit more straight-forwardErik Faye-Lund2019-04-171-5/+7
* virgl: simplify virgl_texture_transfer_unmap logicErik Faye-Lund2019-04-171-13/+9
* virgl: track full virgl_resource instead of just virgl_hw_resErik Faye-Lund2019-04-171-5/+5
* virgl: tmp_resource -> templErik Faye-Lund2019-04-171-4/+3
* virgl: remove pointless transfer-counterErik Faye-Lund2019-04-174-4/+2
* virgl: hide fence internals from the driverChia-I Wu2019-04-152-13/+2
* virgl: handle fence_server_sync in winsysChia-I Wu2019-04-153-8/+3
* Delete autotoolsDylan Baker2019-04-152-45/+0
* virgl: use debug_printf instead of fprintfErik Faye-Lund2019-04-111-1/+3
* virgl: do not warn about display-target bindingErik Faye-Lund2019-04-111-1/+1
* virgl: only warn about unchecked flagsErik Faye-Lund2019-04-111-3/+4
* virgl: unsigned int -> unsignedErik Faye-Lund2019-04-111-1/+1
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