summaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers/virgl
Commit message (Collapse)AuthorAgeFilesLines
* virgl: remove unused variableErik Faye-Lund2019-03-081-1/+0
| | | | | | | | This variable is now unused, so let's remove it. Fixes: db77573d7ba (virgl: modify how we handle GL_MAP_FLUSH_EXPLICIT_BIT) Reviewed-by: Gurchetan Singh <[email protected]> (cherry picked from commit 44620d4ef7d9ac10de489a8238b7f80dce2da510)
* gallium: add PIPE_CAP_MAX_VARYINGSKarol Herbst2019-02-121-0/+4
| | | | | | | | | | | | | | | | | | | Some NVIDIA hardware can accept 128 fragment shader input components, but only have up to 124 varying-interpolated input components. We add a new cap to express this cleanly. For most drivers, this will have the same value as PIPE_SHADER_CAP_MAX_INPUTS for the fragment shader. Fixes KHR-GL45.limits.max_fragment_input_components Conflicts resolved by Dylan Signed-off-by: Karol Herbst <[email protected]> [imirkin: rebased, improved docs/commit message] Signed-off-by: Ilia Mirkin <[email protected]> Acked-by: Rob Clark <[email protected]> Acked-by: Eric Anholt <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Cc: 19.0 <[email protected]> (cherry picked from commit 6010d7b8e8bee1bcea2b329cf6d3b44c5fc3ca66)
* virgl: Set sRGB write control CAP based on host capabilitiesGert Wollny2019-01-283-0/+13
| | | | | | | | | v2: - Use the renamed CAPS - add assetions to make sure that mesa doesn't try to switch destination surface formats when it is not supported. (Ilia Mirkin) Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* virgl: use primconvert provoking vertex properlyDave Airlie2019-01-082-8/+24
| | | | | | | | This stores the raster state and calls the correct primconvert interface using the currently bound raster state. Reviewed-By: Gert Wollny <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* virgl: remove empty fileGurchetan Singh2019-01-031-0/+0
| | | | | Fixes: 174f53 ("virgl: consolidate transfer code") Reviewed-by: Erik Faye-Lund <[email protected]>
* virgl: don't flush an empty rangeGurchetan Singh2019-01-031-0/+4
| | | | | | | | | | | | | | Otherwise, the gl-1.0-long-dlist Piglit test crashes. Fixes: db7757 ("virgl: modify how we handle GL_MAP_FLUSH_EXPLICIT_BIT") Reported by airlied@ v2: Exit on any invalid range (Erik) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109190 Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Erik Faye-Lund <[email protected]> Tested-by: Jakob Bornecrantz <[email protected]>
* virgl: move resource creation / import / destruction to common codeGurchetan Singh2018-12-194-114/+89
| | | | | | We can remove some duplicated code. Reviewed-by: Elie Tournier <[email protected]>
* virgl: move resource metadata into base resourceGurchetan Singh2018-12-194-91/+71
| | | | | | A resource is just a buffer with some metadata. Reviewed-by: Elie Tournier <[email protected]>
* virgl: modify how we handle GL_MAP_FLUSH_EXPLICIT_BITGurchetan Singh2018-12-194-69/+25
| | | | | | | | | | | | | | | | | | Previously, we ignored the the glUnmap(..) operation and flushed before we flush the cbuf. Now, let's just flush the data when we unmap. Neither method is optimal, for example: glMapBufferRange(.., 0, 100, GL_MAP_FLUSH_EXPLICIT_BIT) glFlushMappedBufferRange(.., 25, 30) glFlushMappedBufferRange(.., 65, 70) We'll end up flushing 25 --> 70. Maybe we can fix this later. v2: Add fixme comment in the code (Elie) Reviewed-by: Elie Tournier <[email protected]>
* virgl: make virgl_buffers use resource helpersGurchetan Singh2018-12-192-20/+11
| | | | | | We can reuse the helpers we created. Reviewed-by: Elie Tournier <[email protected]>
* virgl: make transfer code with PIPE_BUFFER targetsGurchetan Singh2018-12-191-2/+4
| | | | | | | util_format_get_blocksize returns 1 for R8 formats (all PIPE_BUFFERs are R8). Reviewed-by: Elie Tournier <[email protected]>
* virgl: consolidate transfer codeGurchetan Singh2018-12-195-59/+73
| | | | | | | | We could allocate and destroy transfers in one place. v2: Keep l_stride around. Reviewed-by: Elie Tournier <[email protected]>
* virgl: store layer_stride in metadataGurchetan Singh2018-12-192-6/+6
| | | | Reviewed-by: Elie Tournier <[email protected]>
* virgl: move vrend_get_tex_image_offset to common codeGurchetan Singh2018-12-193-26/+28
| | | | | | Will be reused. Reviewed-by: Elie Tournier <[email protected]>
* virgl: move virgl_resource_layout to common codeGurchetan Singh2018-12-193-42/+51
| | | | | | Will be reused. Reviewed-by: Elie Tournier <[email protected]>
* virgl: move texture metadata to common codeGurchetan Singh2018-12-192-12/+18
| | | | | | Will be reused. Reviewed-by: Elie Tournier <[email protected]>
* virgl: remove unnessecary codeGurchetan Singh2018-12-191-3/+0
| | | | | | | | | With commit 89b479, we moved to tracking buffer cleanliness when binding. TEST=dEQP-GLES31.functional.image_load_store.buffer.load_store.r32ui Reviewed-by: Elie Tournier <[email protected]>
* virgl: texture_transfer_pool --> transfer_poolGurchetan Singh2018-12-196-11/+11
| | | | | | It's used for all types of resources. Reviewed-by: Elie Tournier <[email protected]>
* virgl: work around bad assumptions in virglrendererErik Faye-Lund2018-12-131-1/+32
| | | | | | | | | | | | | | | | | | | | Virglrenderer does the wrong thing when given an instance divisor; it tries to use the element-index rather than the binding-index as the argument to glVertexBindingDivisor(). This worked fine as long as there was a 1:1 relationship between elements and bindings, which was the case util 19a91841c34 "st/mesa: Use Array._DrawVAO in st_atom_array.c.". So let's detect instance divisors, and restore a 1:1 relationship in that case. This will make old versions of virglrenderer behave correctly. For newer versions, we can consider making a better interface, where the instance divisor isn't specified per element, but rather per binding. But let's save that for another day. Signed-off-by: Erik Faye-Lund <[email protected]> Fixes: 19a91841c34 "st/mesa: Use Array._DrawVAO in st_atom_array.c." Reviewed-by: Mathias Fröhlich <[email protected]> Tested-By: Gert Wollny <[email protected]>
* virgl: wrap vertex element state in a structErik Faye-Lund2018-12-132-9/+21
| | | | | | | | | This just has one member for now; the handle. But this is about to change. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Mathias Fröhlich <[email protected]> Tested-By: Gert Wollny <[email protected]>
* virgl: simplify virgl_hw_set_index_bufferErik Faye-Lund2018-12-131-3/+2
| | | | | | Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Mathias Fröhlich <[email protected]> Tested-By: Gert Wollny <[email protected]>
* virgl: simplify virgl_hw_set_vertex_buffersErik Faye-Lund2018-12-131-4/+2
| | | | | | Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Mathias Fröhlich <[email protected]> Tested-By: Gert Wollny <[email protected]>
* virgl: force linear texturing supportErik Faye-Lund2018-12-121-2/+3
| | | | | | | | | | | | | | | When I made sure that half-float texture-filtering was required for ES3, I didn't realize that virgl doesn't report support for this correctly. This regressed the GLES version available on top of several drivers, including i965 from 3.2 to 2.0. This is going to need protocol changes to fix properly, so let's just restore the previous behavior by enabling floating-point filtering unconditionally for now. Signed-off-by: Erik Faye-Lund <[email protected]> Fixes: fcf9fcee3c8 "mesa/main: do not require float-texture filtering for es3" Reviewed-by: Gurchetan Singh <[email protected]>
* virgl: fix const warning on debug flags.Dave Airlie2018-12-042-3/+3
| | | | Fixes: 8d4bb6e5c (virgl: Add command and flags to initiate debugging on the host (v2))
* virgl: don't mark buffers as unclean after a writeGurchetan Singh2018-11-302-1/+10
| | | | | | | | | | | | | | | | | We can mark the buffer unclean if it's ever bound as a TBO, SSBO, ABO, or image. This improves dEQP-GLES3.performance.buffer.data_upload.function_call.map_buffer_range.new_specified_buffer.flag_write_full.stream_draw from 9.58 MB/s to 451.17 MB/s. v2: Track buffer cleanliness as a function of bindings (Ilia). v3: virgl_modify_clean --> virgl_dirty_res (Erik) Tested-By: Gert Wollny <[email protected]> Reviewed-by: Erik Faye-Lund <[email protected]>
* virgl: avoid large inline transfersGurchetan Singh2018-11-301-1/+5
| | | | | | | | | | | | | | | | | | | | We flush everytime the command buffer (16 kB) is full, which is quite costly. This improves dEQP-GLES3.performance.buffer.data_upload.function_call.buffer_data.new_buffer.usage_stream_draw from 111.16 MB/s to 1930.36 MB/s. In addition, I made the benchmark produce buffers from 0 --> VIRGL_MAX_CMDBUF_DWORDS * 4, and tried ((VIRGL_MAX_CMDBUF_DWORDS * 4) / 2), ((VIRGL_MAX_CMDBUF_DWORDS * 4) / 4), etc. I didn't notice any clear differences, so let's just go with the most obvious heuristic. Tested-By: Gert Wollny <[email protected]> Reviewed-by: Erik Faye-Lund <[email protected]>
* virgl: quadruple command buffer sizeGurchetan Singh2018-11-301-1/+1
| | | | | | | | | | | | Tested running WebGL aquarium on Nvidia host (10,000 fishes) This moves us from 7 fps to 9 fps. After quadrupling, performance gains diminish. v2: Remove change ID (Erik) Tested-By: Gert Wollny <[email protected]> Reviewed-by: Erik Faye-Lund <[email protected]>
* virgl: fix undefined shift to use unsigned.Dave Airlie2018-11-291-1/+1
| | | | | | Ported from virglrenderer. Signed-off-by: Dave Airlie <[email protected]>
* virgl: Don't try handling server fences when they are not supportedGert Wollny2018-11-281-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | vtest doesn't implement the according API and would segfault: Program received signal SIGSEGV, Segmentation fault. #0 0x0000000000000000 in ?? () #1 in virgl_fence_server_sync at src/gallium/drivers/virgl/virgl_context.c:1049 #2 in st_server_wait_sync at src/mesa/state_tracker/st_cb_syncobj.c:155 so just don't do the call when the function pointers are not set. Fixes dEQP: dEQP-GLES3.functional.fence_sync.wait_sync_smalldraw dEQP-GLES3.functional.fence_sync.wait_sync_largedraw Fixes: d1a1c21e7621b5177febf191fcd3d3b8ef69dc96 virgl: native fence fd support Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Robert Foss <[email protected]>
* virgl: add assert and missing function parameterRobert Foss2018-11-211-1/+4
| | | | | | | | | | Verify the pipe_fd_type to be of PIPE_FD_TYPE_NATIVE_SYNC. Fixes: d1a1c21e7621b5177feb "virgl: native fence fd support" Suggested-by: Eric Engestrom <[email protected]> Signed-off-by: Robert Foss <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* virgl: Clean up fences commitRobert Foss2018-11-181-1/+1
| | | | | | | | Remove a dead variable, a int->bool conversion and some whitespace changes. Signed-off-by: Robert Foss <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* virgl: native fence fd supportRobert Foss2018-11-163-10/+62
| | | | | | | | | Following the support for fences on the virtio driver add support for native fence on virgl. This was somewhat based on the freedeno one. Signed-off-by: Gustavo Padovan <[email protected]> Signed-off-by: Robert Foss <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* virgl: Add command and flags to initiate debugging on the host (v2)Gert Wollny2018-11-135-0/+37
| | | | | | | | | | | | On the host VREND_DEBUG=guestallow must be set to let the guest override the debug flags. v2: Send flag string instead of flags, this avoids the need to keep the flags in sync. v3: Only request host logging if the host actually understands the command Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Erik Faye-Lund <[email protected]>
* virgl: adjust strides when mapping temp-resourcesErik Faye-Lund2018-09-141-0/+2
| | | | | | | | | | | | | | When we're mapping temp-resources, we clip the resource to the transfer-box, which means the stride might not be correct any more. So let's update the stride from the temp-resource, and recompute the layer-stride. This fixes crashes when running dEQP with --deqp-gl-config-name=rgba8888d24s8ms4 Signed-off-by: Erik Faye-Lund <[email protected]> Fixes: a8987b88ff1 "virgl: add driver for virtio-gpu 3D (v2)" Reviewed-by: Dave Airlie <[email protected]>
* virgl: do not map zero-sized resourceErik Faye-Lund2018-09-101-2/+1
| | | | | | | | | | | | | | | | When creating textures, we avoid creating backing-store for all multisampled textures, not just depth buffers. So we can't try to map them later. That's just going to fail. So let's take the blit-based code-path that seems to avoid this problem. This make this piglit test-case no longer crash (although it still fails): bin/copyteximage 2D -samples=2 -auto Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* virgl: remove dead codeErik Faye-Lund2018-09-101-5/+1
| | | | | | | | We don't use the size we calculate in this function, so let's just drop the calculation Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* virgl: drop needless return-codeErik Faye-Lund2018-09-101-2/+1
| | | | | | | | We always return TRUE, and we never check the return-value. Let's just drop the return value instead. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* virgl: free trans on map-errorErik Faye-Lund2018-09-101-0/+1
| | | | | | | | | | When we fail to map memory, we should also free trans to avoid leaking memory. Noticed while reading code. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* virgl: don't send a shader create with no data. (v2)Dave Airlie2018-09-101-1/+1
| | | | | | | | | | | | | This fixes the situation where we'd send a shader with just the header and no data. piglit/glsl-max-varyings test was causing this to happen, and the renderer fix was breaking it. v2: drop fprintf Fixes: a8987b88ff1d "virgl: add driver for virtio-gpu 3D (v2)" Reviewed-by: Erik Faye-Lund <[email protected]>
* gallium: add PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGETMarek Olšák2018-09-071-0/+1
|
* gallium: enable GL_AMD_depth_clamp_separate on r600, radeonsiMarek Olšák2018-09-061-0/+1
|
* gallium: split depth_clip into depth_clip_near & depth_clip_farMarek Olšák2018-09-061-1/+1
| | | | for AMD_depth_clamp_separate.
* virgl: use hw-atomics instead of in-ssbo onesTomeu Vizoso2018-09-057-2/+89
| | | | | | | | Emulating atomics on top of ssbos can lead to too small max SSBO count, so let's use the hw-atomics mechanism to expose atomic buffers instead. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* virgl: update minor differences to upstream headerErik Faye-Lund2018-09-051-1/+1
| | | | | | | | | | | virgl_protocol.h is considered to have it's upstream in the virglrenderer repository, and somehow these minor differences has crept in. Let's sync with the upstream to avoid this. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* gallium: Add a helper for implementing PIPE_CAP_* default values.Eric Anholt2018-09-041-3/+3
| | | | | | | | | | | | | | | | | | One of the pains of implementing a gallium driver is filling in a million pipe caps you don't know about yet when you're just starting out. One of the pains of working on gallium is copy-and-pasting your new PIPE_CAP into each driver. We can fix both of these by having each driver call into the default helper from their default case, so that both sides can ignore each other until they need to. v2: fix i915g build, revert swr change to avoid breaking scons build (https://travis-ci.org/anholt/mesa/jobs/419739857) v3: Rebase on 3 new gallium caps. Reviewed-by: Marek Olšák <[email protected]> (v1) Cc: Bruce Cherniak <[email protected]> Cc: George Kyriazis <[email protected]> Cc: Kenneth Graunke <[email protected]>
* virgl: add debug-switch to output TGSIErik Faye-Lund2018-08-283-0/+5
| | | | | | | | This is quite useful for debugging shader-transpiling issues in virglrenderer. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-By: Gert Wollny <[email protected]>
* virgl: introduce $VIRGL_DEBUG=verboseErik Faye-Lund2018-08-284-3/+18
| | | | | | | | | | This adds an environment-varaible that can be used for driver-specific flags, as well as a flag for it to enable verbose output. While we're at it, quiet some overly chatty debug-output by default. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-By: Gert Wollny <[email protected]>
* virgl: replace fprintf-call with debug_printfErik Faye-Lund2018-08-281-1/+1
| | | | | | | | This is the only direct call-site for fprintf in virgl; all other call-sites call debug_printf instead. So let's follow in style here. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-By: Gert Wollny <[email protected]>
* virgl: delete commented out fprintf-callErik Faye-Lund2018-08-281-1/+0
| | | | | | | This is just debug-cruft left over. Let's just get rid of it. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-By: Gert Wollny <[email protected]>
* gallium: Split out PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE.Kenneth Graunke2018-08-241-0/+1
| | | | | | | | | | | | | Some hardware can do PIPE_TEX_WRAP_MIRROR_REPEAT but not PIPE_TEX_WRAP_MIRROR_CLAMP and PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER. Drivers for such hardware would like to advertise support for ARB_texture_mirror_clamp_to_edge but not EXT_texture_mirror_clamp. This commit adds a new PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE bit, changes the extension enable to be based on that, and enables it in all upstream drivers which supported PIPE_CAP_TEXTURE_MIRROR_CLAMP (so they continue supporting this mode).
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-19 01:40:46 +0000