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* gallium: add PIPE_SHADER_CAP_GLSL_16BIT_TEMPS for LowerPrecisionTemporariesMarek Olšák2020-07-071-0/+1
| | | | | Reviewed-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5746>
* gallium: Add pipe cap for primitive restart with fixed indexNeil Roberts2020-06-221-0/+1
| | | | | | | | | | | | | | | | | | | | Adds PIPE_CAP_PRIMITIVE_RESTART_FIXED_INDEX which is a subset of the primitive restart cap for when the hardware can only support the fixed indices specified in GLES. The switch statements were automatically modified with this command: find \( \( -name \*.cpp -o -name \*.c \) \! -type l \) \ -exec sed -i -r \ 's/^(\s*case\s+PIPE_CAP_PRIMITIVE_RESTART)\s*:.*$/\0\n\1_FIXED_INDEX:/' \ {} \; v2: Add a note in screen.rst Reviewed-by: Eric Anholt <[email protected]> (v1) Reviewed by: Erik Faye-Lund <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5559>
* virgl: change vendor id to reflect reality more.Dave Airlie2020-06-171-1/+1
| | | | | | | | | | | virgl vendor id should probably be little more generic now. I think I picked this becuase the virtio pci id space was under RH's name and they did pay for it, but at this point I think it's better to just use something generic. Reviewed-by: Gert Wollny <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5483>
* gallium: add shader caps INT16 and FP16_DERIVATIVESMarek Olšák2020-06-021-0/+2
| | | | | Reviewed-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5002>
* gallium: change comments to remove 'state tracker'Marek Olšák2020-05-131-1/+1
| | | | | | | Acked-by: Eric Anholt <[email protected]> Acked-by: Alyssa Rosenzweig <[email protected]> Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4902>
* virgl: Enable CAP_CLEAR_TEXTURE if host supports itElie Tournier2020-05-071-1/+2
| | | | | | Signed-off-by: Elie Tournier <[email protected]> Reviewed-by: Gert Wollny <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4345>
* virgl: Use ETC2 formats directly when possible.Lepton Wu2020-04-161-0/+3
| | | | | | | | | Don't emulate them with uncompressed formats if the host support them since uncompressed formats like GL_R16 could be not available on GLES hosts. Signed-off-by: Lepton Wu <[email protected]> Reviewed-by: Gert Wollny <[email protected]>
* util: Move gallium's PIPE_FORMAT utils to /util/format/Eric Anholt2019-11-141-2/+2
| | | | | | | | | | | | | | | To make PIPE_FORMATs usable from non-gallium parts of Mesa, I want to move their helpers out of gallium. Since u_format used util_copy_rect(), I moved that in there, too. I've put it in a separate directory in util/ because it's a big chunk of related code, and it's not clear to me whether we might want it as a separate library from libmesa_util at some point. Closes: #1905 Acked-by: Marek Olšák <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* virgl: Remove formats with unusual sample count.Lepton Wu2019-10-241-0/+3
| | | | | | | | | Most GPU require the sample count is power of 2. Just remove those formats with unusual sample count. This decreases dEQP EGL tests run time a lot. Signed-off-by: Lepton Wu <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* gallium: remove PIPE_SHADER_CAP_SCALAR_ISAMarek Olšák2019-10-101-2/+0
| | | | | | Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* virgl: fix format conversion for recent gallium changes.Dave Airlie2019-08-261-4/+6
| | | | | | | | | | | | | | | | | | The virgl formats are fixed in time snapshots of the gallium ones, we just need to provide a translation table between them when we enter the hardware. This fixes a regression since Eric renumbered the gallium table. Fixes: c45c33a5a2 (gallium: Remove manual defining of PIPE_FORMAT enum values.) Bugzilla: https://bugs.freedesktop.org/111454 v1 by Dave Airlie <[email protected]> v2: virgl: Add a number of formats to the table that are used, e.g. for vertex attributes v3: cover some more missing formats from a piglit run Signed-off-by: Gert Wollny <[email protected]>
* virgl: check scanout maskGurchetan Singh2019-08-081-0/+6
| | | | | | | | | Otherwise, virgl will report renderable or texturable formats as also scan-out formats. v2: drop host feature check (@kusma) Reviewed-by: Erik Faye-Lund <[email protected]>
* virgl: fixup_readback_format --> fixup_formatsGurchetan Singh2019-08-081-8/+7
| | | | | | | This function is generalizable. Suggested-by: Erik Faye-Lund <[email protected]> Reviewed-by: Erik Faye-Lund <[email protected]>
* virgl: access caps in a less verbose way in virgl_is_format_supportedGurchetan Singh2019-08-081-9/+9
| | | | Reviewed-by: Erik Faye-Lund <[email protected]>
* virgl: Enable depth_clamp by lowering if the host is new enough.Gert Wollny2019-08-011-1/+5
| | | | | Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Reviewed-by: Marek Olšák <[email protected]>
* virgl: make use of local variableEric Engestrom2019-07-311-1/+1
| | | | | | | | Otherwise that variable is only used in an assert() and would need an ASSERTED to avoid the warning. Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* gallium: switch boolean -> bool at the interface definitionsIlia Mirkin2019-07-221-35/+35
| | | | | | | | | | | | | | | | | | This is a relatively minimal change to adjust all the gallium interfaces to use bool instead of boolean. I tried to avoid making unrelated changes inside of drivers to flip boolean -> bool to reduce the risk of regressions (the compiler will much more easily allow "dirty" values inside a char-based boolean than a C99 _Bool). This has been build-tested on amd64 with: Gallium drivers: nouveau r300 r600 radeonsi freedreno swrast etnaviv v3d vc4 i915 svga virgl swr panfrost iris lima kmsro Gallium st: mesa xa xvmc xvmc vdpau va Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Acked-by: Alyssa Rosenzweig <[email protected]>
* gallium: get rid of PIPE_CAP_SM3Erik Faye-Lund2019-07-101-1/+3
| | | | | | | | | | | | | | | | | | | | | PIPE_CAP_SM3 has always been an odd one out of all our caps. While most other caps are fine-grained and single-purpose, this cap encode several features in one. And since OpenGL cares more about single features, it'd be nice to get rid of this one. As it turns, this is now relatively simple. We only really care about three features using this cap, and those already got their own caps. So we can remove it, and make sure all current drivers just give the same response to all of them. The only place we *really* care about SM3 is in nine, and there we can instead just re-construct the information based on the finer-grained caps. This avoids DX9 semantics from needlessly leaking into all of the drivers, most of who doesn't care a whole lot about DX9 specifically. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Acked-by: Alyssa Rosenzweig <[email protected]>
* virgl: add VIRGL_DEBUG_XFERChia-I Wu2019-06-251-0/+1
| | | | | | | | When set, do as requested and skip any transfer optimization. Signed-off-by: Chia-I Wu <[email protected]> Reviewed-By: Gert Wollny <[email protected]> Reviewed-By: Alexandros Frantzis <[email protected]>
* virgl: add VIRGL_DEBUG_SYNCChia-I Wu2019-06-251-0/+1
| | | | | | | | When set, wait after every each flush. Signed-off-by: Chia-I Wu <[email protected]> Reviewed-By: Gert Wollny <[email protected]> Reviewed-By: Alexandros Frantzis <[email protected]>
* virgl: fix the value of VIRGL_DEBUG_BGRA_DEST_SWIZZLEChia-I Wu2019-06-251-4/+4
| | | | | | | | | | | | VIRGL_DEBUG_BGRA_DEST_SWIZZLE should use bit 3. Make some cosmetic changes as well. Fixes: a478e56fbd33fa23503b63d41265a1c2f3253ed2 virgl: Add debug flag to bypass driconf to enable the BGRA tweaks Signed-off-by: Chia-I Wu <[email protected]> Reviewed-By: Gert Wollny <[email protected]> Reviewed-By: Alexandros Frantzis <[email protected]>
* virgl: Add debug flag to bypass driconf to enable the BGRA tweaksGert Wollny2019-06-201-0/+5
| | | | | | | | This useful for testing, also because with vtest the dri configuration is not read. Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* virgl: Add a tweak to set the value for emulated queries of GL_SAMPLES_PASSEDGert Wollny2019-06-201-0/+5
| | | | | | | | | | | | | | On GLES hosts GL_SAMPLES_PASSED is emulated by GL_ANY_SAMPLES_PASSED which returns a boolen. With this tweak the value that is returned if any sample passed can be set. This may be of iterest when an application decides whether some geometry is rendered based on an amount of visibility and not just a binary desicion. virgelrenderer sets a default of 1024 on th host. v2: Remove reference from virgl and correct description (Emil) v3: Send the tweak binary encoded instead of using strings (Gurchetan) Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* virgl: Add tweak to apply a swizzle when drawing/blitting to a emulated BGRA ↵Gert Wollny2019-06-201-0/+3
| | | | | | | | | | | | texture With Qemu this final swizzle is not needed, but with vtest it is, i.e. it depends on how a program using virglrenderer uses the surface that is rendered to, hence a tweak is added. v2: Update description and fix spelling (Emil) v3: Send tweak as binary value instead of using strings (Gurchetan) Reviewed-by: Gurchetan Singh <[email protected]>
* virgl: Add driconf tweak for emulating BGRA surfaces on GLESGert Wollny2019-06-201-0/+7
| | | | | | | | | | | These tweaks are used to fix rendering issues with Valve games and at least also "The Raven Remastered" when run on a GLES host. v2: Fix type in define and remove virgl from driconf option (Emil) v3: Encode tweak binary instead of using strings (Gurchetan) Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* virgl: Add override for BGRA format to use swizzled SRGB formatGert Wollny2019-06-201-0/+6
| | | | | | | | | | | Tie in the check whether the host supports tweaks and whether this tweak is enabled. v2: Add comment about the emulated formats not being used directly in the guest (Gurchetan) Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* virgl: Add code to accept BGRx_SRGB as RGBx_SRGBGert Wollny2019-06-201-3/+22
| | | | | | | This will be enabled in later patches by the emulation tweak. Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* virgl: factor out format host bits checkGert Wollny2019-06-201-16/+17
| | | | | | | This will make it a single location when we want to replace a format. Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* gallium/virgl: Add code path for virgl to read driconfGert Wollny2019-06-201-1/+1
| | | | | | | | | | | | This works only for the drm variant of virgl and not for the vtest variant. v2: Rebase, replace the configuration query function by a pointer to the configuration data. Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Emil Velikov <[email protected]> (v1) Reviewed-by: Gurchetan Singh <[email protected]>
* virgl: Assume sRGB write control for older guest kernels or virglrenderer hostsGert Wollny2019-06-171-1/+2
| | | | | | | | | | | | | | | | When the host virglrenderer is an older version that doesn't check the sRGB write control feature, or when the guest kernel doesn't support CAPS v2, then the guest will only report support for GL 2.1 on a GL 3.3 host, even though it was supporting 3.3 with earlier guest mesa versions. By also checking the host feature check version this regression can be avoided. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110921 Fixes: 2845939d6a72 virgl: Set sRGB write control CAP based on host capabilities Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Chia-I Wu <[email protected]>
* virgl: Enable CAP_CLIP_HALFZ if host supports itGert Wollny2019-06-061-1/+2
| | | | | | | | | | | On according hosts this enables the piglits as "pass": arb_clip_control-* v2: sync flag with host Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Chia-I Wu <[email protected]> (v1) Reviewed-by: Emil Velikov <[email protected]>
* gallium: Change PIPE_CAP_TGSI_FS_FBFETCH bool to PIPE_CAP_FBFETCH countKenneth Graunke2019-05-231-2/+3
| | | | | | | | | | | | | | TGSI's FBFETCH instruction currently only supports reading from a single render target, but NIR intrinsics can support multiple render targets. radeonsi can only support fetching from RT 0, but other drivers may be able to support fetching from any render target. To express this, this patch renames PIPE_CAP_TGSI_FS_FBFETCH to simply PIPE_CAP_FBFETCH, and converts it from a boolean "is FBFETCH supported?" to an integer number of render targets which can be fetched. Reviewed-by: Marek Olšák <[email protected]>
* gallium: Redefine the max texture 2d cap from _LEVELS to _SIZE.Eric Anholt2019-05-131-3/+3
| | | | | | | | The _LEVELS assumes that the max is always power of two. For V3D 4.2, we can support up to 7680 non-power-of-two MSAA textures, which will let X11 support dual 4k displays on newer hardware. Reviewed-by: Marek Olšák <[email protected]>
* virgl: get readback-formats from hostErik Faye-Lund2019-04-171-0/+40
| | | | | Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* virgl: Enable passing arrays as input to fragment shadersGert Wollny2019-04-101-0/+5
| | | | | | | | | | | | | | | | | | | This is needed to properly handle interpolateAt* when the input to be interpolated is passed as array in the original GLSL. Currently, the the GLSL compiler would lower selecting the correct input so that the interpolant parameter to interpolateAt* is a temporary, and this can not be used to create a valid shader on the host side, because here the parameter must a shader input. By allowing the passing the created TGSI allows to create proper GLSL. This is related to the virglrenderer bug https://gitlab.freedesktop.org/virgl/virglrenderer/issues/74 v2: Squash the two patches handling these flags into another Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* virgl: add support for ARB_indirect_parametersDave Airlie2019-04-091-1/+2
| | | | | | The protocol changes are already in place for it. Reviewed-By: Gert Wollny <[email protected]>
* virgl: add support for ARB_multi_draw_indirectDave Airlie2019-04-091-1/+2
| | | | | | | This will pass the multi draw through to the host if it has support for it instead of using the st to emulate it Reviewed-By: Gert Wollny <[email protected]>
* virgl: define MAX_VERTEX_STREAMS based on availability of TF3Gert Wollny2019-04-021-1/+2
| | | | | | | | | | Since with gles hosts we lie about the GLSL feature level it is better to set the number of streams based on actual hosts capabilities. v2: Make use of feature check level to avoid regressions. Signed-off-by: Gert Wollny <[email protected]> Reviewed-By: Reviewed-by: Gurchetan Singh <[email protected]>
* virgl: stricter usage of compressed 3d texturesErik Faye-Lund2019-04-021-0/+6
| | | | | | | | | | | | | Using RGTC, ETC1, ETC2 or S3TC for 3D-textures isn't alowed by any of OpenGL 4.6, OpenGL ES 3.2, ARB_texture_compression_rgtc, EXT_texture_compression_rgtc, OES_compressed_ETC1_RGB8_texture, S3_s3tc or EXT_texture_compression_s3tc specifications. So let's not allow any of those compressed 3d-textures at all. It's not going to work once it hits the OpenGL driver in virglrenderer. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* virgl: do not allow compressed formats for buffersErik Faye-Lund2019-04-021-0/+3
| | | | | Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* virgl: Add a caps feature check versionGert Wollny2019-03-291-1/+2
| | | | | | | | | | | | | | | | | | When we add new feature checks on the host side that is used to enable a cap conditionally that was enabled unconditionally before we might end up with a feature regression when a new mesa version is used with an old virglrenderer version that doesn't check for that cap. To work around this problem add a version id to the caps that corresponds to the features that are actually checked on the host and check that version too when enabling the cap. Fixes: 2ee197d6e84aa37638d423363aca183952816067 virgl: Enable mixed color FBO attachemnets only when the host supports it Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Pohsien Wang <[email protected]>
* virgl: Fake MSAA when max samples is 1Alexandros Frantzis2019-03-271-1/+4
| | | | | | | | | | | | | | When the host is running on softpipe/llvmpipe the maximum number of samples for multisampling is 1. GL 3.0 requires at least 4 samples, and softpipe/llvmpipe get around this by enabling PIPE_CAP_FAKE_SW_MSAA. This patch mimics softpipe/llvmpipe behavior in virgl by enabling the same PIPE_CAP_FAKE_SW_MSAA workaround when the max sample count reported by the host is 1. This change allows virgl on a softpipe/llvmpipe host to advertise support for GL 3.0 and beyond. Signed-off-by: Alexandros Frantzis <[email protected]> Reviewed-By: Gert Wollny <[email protected]>
* virgl: Set PIPE_CAP_DOUBLES when running on GLES This is a lie but no known ↵Elie Tournier2019-03-091-1/+2
| | | | | | | app use fp64. Signed-off-by: Elie Tournier <[email protected]> Reviewed-by: <Gurchetan Singh [email protected]>
* virgl: Enable mixed color FBO attachemnets only when the host supportsGert Wollny2019-02-221-1/+1
| | | | | | | it Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Elie Tournier <[email protected]>
* gallium: add PIPE_CAP_MAX_VARYINGSKarol Herbst2019-02-071-0/+4
| | | | | | | | | | | | | | | | | Some NVIDIA hardware can accept 128 fragment shader input components, but only have up to 124 varying-interpolated input components. We add a new cap to express this cleanly. For most drivers, this will have the same value as PIPE_SHADER_CAP_MAX_INPUTS for the fragment shader. Fixes KHR-GL45.limits.max_fragment_input_components Signed-off-by: Karol Herbst <[email protected]> [imirkin: rebased, improved docs/commit message] Signed-off-by: Ilia Mirkin <[email protected]> Acked-by: Rob Clark <[email protected]> Acked-by: Eric Anholt <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Cc: 19.0 <[email protected]>
* virgl: ARB_query_buffer_object supportDave Airlie2019-01-311-1/+2
| | | | | | v1.1: fix size define. Reviewed-by: Gurchetan Singh <[email protected]>
* virgl: enable elapsed time queriesDave Airlie2019-01-311-1/+1
| | | | | | GL underneath always has GL_TIME_ELAPSED so always enable these. Reviewed-by: Gurchetan Singh <[email protected]>
* virgl: Set sRGB write control CAP based on host capabilitiesGert Wollny2019-01-281-0/+2
| | | | | | | | | v2: - Use the renamed CAPS - add assetions to make sure that mesa doesn't try to switch destination surface formats when it is not supported. (Ilia Mirkin) Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* virgl: texture_transfer_pool --> transfer_poolGurchetan Singh2018-12-191-2/+2
| | | | | | It's used for all types of resources. Reviewed-by: Elie Tournier <[email protected]>
* virgl: force linear texturing supportErik Faye-Lund2018-12-121-2/+3
| | | | | | | | | | | | | | | When I made sure that half-float texture-filtering was required for ES3, I didn't realize that virgl doesn't report support for this correctly. This regressed the GLES version available on top of several drivers, including i965 from 3.2 to 2.0. This is going to need protocol changes to fix properly, so let's just restore the previous behavior by enabling floating-point filtering unconditionally for now. Signed-off-by: Erik Faye-Lund <[email protected]> Fixes: fcf9fcee3c8 "mesa/main: do not require float-texture filtering for es3" Reviewed-by: Gurchetan Singh <[email protected]>
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