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path: root/src/gallium/drivers/vc4
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* nir: Add lower_rotate flag and set to true in all driversSagar Ghuge2019-07-011-0/+1
* vc4: Enable NIR's lower_fmod option.Kenneth Graunke2019-06-051-0/+1
* nir: Drop imov/fmov in favor of one mov instructionJason Ekstrand2019-05-241-2/+1
* gallium: Redefine the max texture 2d cap from _LEVELS to _SIZE.Eric Anholt2019-05-131-1/+2
* nir: allow specifying a set of opcodes in lower_alu_to_scalarJonathan Marek2019-05-101-1/+1
* nir: Initialize lower_flrp_progress everywhereIan Romanick2019-05-091-1/+1
* nir: Use the flrp lowering pass instead of nir_opt_algebraicIan Romanick2019-05-061-0/+22
* nir: nir_shader_compiler_options: drop native_integersChristian Gmeiner2019-05-071-1/+0
* vc4: Fall back to renderonly if the vc4 driver doesn't have v3d.Eric Anholt2019-04-261-1/+0
* vc4: Use _mesa_hash_table_remove_key() where appropriate.Eric Anholt2019-04-261-12/+9
* vc4: fix buildRhys Perry2019-04-151-1/+0
* Delete autotoolsDylan Baker2019-04-152-77/+0
* gallium: add support for formatted image loadsRhys Perry2019-04-151-0/+1
* nir: make nir_const_value scalarKarol Herbst2019-04-141-1/+1
* nir/i965/freedreno/vc4: add a bindless bool to type size functionsTimothy Arceri2019-04-121-1/+1
* vc4: Upload CS/VS UBO uniforms together.Eric Anholt2019-04-105-181/+22
* vc4: Split UBO0 and UBO1 address uniform handling.Eric Anholt2019-04-103-19/+20
* vc4: Don't forget to set the range when scalarizing our uniforms.Eric Anholt2019-04-101-0/+2
* st: Lower uniforms in st in the !PIPE_CAP_PACKED_UNIFORMS case as well.Eric Anholt2019-04-101-6/+1
* nir: Get rid of global registersJason Ekstrand2019-04-091-2/+0
* vc4: Prefer nir_src_comp_as_uint over nir_src_as_const_valueJason Ekstrand2019-04-072-18/+16
* vc4: Use shared drm_find_modifier utilAlyssa Rosenzweig2019-03-141-15/+3
* vc4: Switch the post-RA scheduler over to the DAG datastructure.Eric Anholt2019-03-111-110/+73
* v3d: Use the DAG datastructure for QPU instruction scheduling.Eric Anholt2019-03-111-3/+3
* vc4: Reuse list_for_each_entry_rev().Eric Anholt2019-03-111-2/+2
* vc4: Switch over to using the DAG datastructure for QIR scheduling.Eric Anholt2019-03-111-79/+55
* tgsi_to_nir: Produce optimized NIR for a given pipe_screen.Timur Kristóf2019-03-051-1/+1
* drm-uapi: use local files, not system libdrmEric Engestrom2019-02-146-8/+8
* gallium: add PIPE_CAP_MAX_VARYINGSKarol Herbst2019-02-071-0/+3
* vc4: Fix leak in HW queries error pathErnestas Kulik2019-01-291-1/+1
* vc4: Enable NEON asm on meson cross-builds.Eric Anholt2019-01-281-4/+6
* nir: add bit_size parameter to system values with multiple allowed bit sizesKarol Herbst2019-01-211-2/+2
* nir: rename nir_var_function to nir_var_function_tempKarol Herbst2019-01-191-2/+2
* nir: rename global/local to private/function memoryKarol Herbst2019-01-081-2/+2
* vc4: Hook up perf_debug() output to GL_ARB_debug_output as well.Eric Anholt2018-12-202-0/+3
* vc4: Wire up core pipe_debug_callbackRhys Kidd2018-12-202-0/+14
* vc4: Move the utile load/store functions to a header for reuse by v3d.Eric Anholt2018-12-192-202/+11
* nir/opt_peephole_select: Don't peephole_select expensive math instructionsIan Romanick2018-12-171-1/+1
* nir/opt_peephole_select: Don't try to remove flow control around indirect loadsIan Romanick2018-12-171-1/+1
* vc4: Reuse nir_format_convert.h in our blend lowering.Eric Anholt2018-12-171-33/+3
* nir: Add a bool to int32 lowering passJason Ekstrand2018-12-161-0/+2
* nir: Rename Boolean-related opcodes to include 32 in the nameJason Ekstrand2018-12-161-20/+20
* vc4: Use the original bit size when scalarizing uniform loads.Eric Anholt2018-12-161-1/+2
* vc4: Fix a leak of the transfer helper on screen destroy.Eric Anholt2018-12-071-0/+3
* nir: Make boolean conversions sized just like the othersJason Ekstrand2018-12-051-4/+4
* nir: Make nir_lower_clip_vs optionally work with variables.Kenneth Graunke2018-11-191-1/+2
* vc4: Don't return a vc4 BO handle on a renderonly screen.Eric Anholt2018-11-151-2/+4
* vc4: Make sure we make ro scanout resources for create_with_modifiers.Eric Anholt2018-11-151-1/+9
* vc4: Use the normal simulator ioctl path for CL submit as well.Eric Anholt2018-11-023-13/+5
* vc4: Maintain a separate GEM mapping of BOs in the simulator.Eric Anholt2018-11-022-42/+58