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* vc4: Use the normal simulator ioctl path for CL submit as well.Eric Anholt2018-11-021-5/+4
| | | | The simulator no longer needs to look back into the gallium structs.
* vc4: Maintain a separate GEM mapping of BOs in the simulator.Eric Anholt2018-11-021-41/+58
| | | | This will let us avoid looking back into the gallium driver's vc4_bo.
* vc4: Take advantage of _mesa_hash_table_remove_key() in the simulator.Eric Anholt2018-11-021-4/+2
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* vc4: Drop the winsys_stride relayout in the simluatorEric Anholt2018-11-011-77/+2
| | | | | | | Since 0c1dd9dee0da ("broadcom/vc4: Allow importing linear BOs with arbitrary offset/stride."), we have the vc4-side BO properly laid out (assuming it's linear) in the winsys BO so that we can skip this extra copy.
* brodacom/vc4: Fix simulator since the perfmon change.Eric Anholt2018-03-131-0/+1
| | | | | | It would be nice to support perfmon with simulator, and might be a useful tool for regression testing performance (since the simulator would be deterministic).
* broadcom/vc4: Fix simulator mode for the MADVISE usage.Eric Anholt2017-11-091-0/+4
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* broadcom/vc4: Fix false-positive for the tiling ioctls on simulator mode.Eric Anholt2017-10-171-0/+1
| | | | | If there happened to be an ENOENT laying around, we would try using the ioctls later and fail out resource allocation.
* broadcom/vc4: Skip BO labeling when in simulator mode.Eric Anholt2017-10-171-0/+4
| | | | | It was calling down into i915 trying to label the BO, which is definitely not the right thing.
* broadcom/vc4: Expose PIPE_CAP_TILE_RASTER_ORDEREric Anholt2017-10-101-0/+1
| | | | | | | | | | | | | | Because vc4 can control the order that tiles are rasterized in, we can use it to implement overlapping blits using normal drawing and GL_ARB_texture_barrier, as long as we can tell the kernel what order to render the tiles in. v2: Fix on the simulator. v3: Add the cap (disabled) to other drivers, add rst docs for the cap. v4: Rebase on PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS v5: Split from the core gallium commit, drop some unnecessary code related to glBlitFramebuffer(), fix a crash with clears before state has been bound.
* vc4: Set shareable BOs as T tiled if possibleEric Anholt2017-07-121-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | X11 and GL compositor performance on VC4 has been terrible because of our SHARED-usage buffers all being forced to linear. This swaps SHARED && !LINEAR buffers over to being tiled. This is an expected win for all GL compositors during rendering (a full copy of each shared texture per draw call), allows X11 to be used with decent performance without a GL compositor, and improves X11 windowed swapbuffers performance as well. It also halves the memory usage of shared buffers that get textured from. The only cost should be idle systems with a scanout-only buffer that isn't flagged as LINEAR, in which case the memory bandwidth cost of scanout goes up ~25%. This implements the EGL_EXT_image_dma_buf_import_modifiers extension, supporting the VC4 T_TILED modifier. v2: Added modifier support to resource creation/import, and advertisement (by daniels). v3: Fix old-kernel fallback path, fix compiler error and warnings, and comment touchups (by anholt). Reviewed-by: Daniel Stone <[email protected]>
* vc4: Start using XML unpack functions in CL dump.Eric Anholt2017-06-301-0/+1
| | | | | | For now this is a no-op on the output, but it makes it clear that we've had weird things going on with things like V3D21_CLIPPER_Z_SCALE_AND_OFFSET.
* vc4: Drop the u_resource_vtbl no-op layer.Eric Anholt2017-05-171-2/+2
| | | | | We only ever attached one vtbl, so it was a waste of space and indirections.
* vc4: Try compiling our FSes in multithreaded mode on new kernels.Eric Anholt2016-11-161-0/+1
| | | | | | Multithreaded fragment shaders let us hide texturing latency by a hyperthreading-style switch to another fragment shader. This gets us up to 20% framerate improvements on glmark2 tests.
* vc4: Add support for ETC1 textures if the kernel is new enough.Eric Anholt2016-11-161-0/+1
| | | | | The kernel changes for exposing the param have now been merged, so we can expose it here.
* vc4: Fix simulator mode missing-GETPARAM debug info.Eric Anholt2016-11-161-1/+1
| | | | The value is 0 since we didn't set it, we wanted to see the param.
* vc4: Add a comment with discussion of how simulation works.Eric Anholt2016-10-211-0/+25
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* vc4: Move simulator winsys mapping and tracking to the simulator.Eric Anholt2016-10-211-6/+51
| | | | | One tiny hack is left in vc4_bufmgr.c for what kind of mapping we got so that we can free it.
* vc4: Move simulator memory management to a u_mm.h heap.Eric Anholt2016-10-211-39/+199
| | | | | | Now we aren't limited to 256MB total allocated across a driver instance, just 256MB at one time. We're still copying in and out, which should get fixed.
* vc4: Move simulator globals into a struct.Eric Anholt2016-10-211-31/+29
| | | | | I would like to put a couple more things in here, so it's time to package it up.
* vc4: Restructure the simulator mode.Eric Anholt2016-10-211-0/+139
| | | | | | | | | | | | | Rather than having simulator mode changes scattered around vc4_bufmgr.c and vc4_screen.c, make vc4_bufmgr.c just call a vc4_simulator_ioctl, which then dispatches to a corresponding implementation. This will give the simulator support a centralized place to do tricks like storing most BOs directly in simulator memory rather than copying in and out. This leaves special casing of mmaping BOs and execution, because of the winsys mapping.
* vc4: Fix simulator when more than one vc4_screen is opened.Eric Anholt2016-10-061-3/+33
| | | | | | We would assertion fail in setting up the simulator the second time around. This at least postpones the assertion failure until we've closed all of the first set of screens and started opening a new set.
* vc4: Implement job shufflingEric Anholt2016-09-141-5/+5
| | | | | | | | | | | | | | | Track rendering to each FBO independently and flush rendering only when necessary. This lets us avoid the overhead of storing and loading the frame when an application momentarily switches to rendering to some other texture in order to continue rendering the main scene. Improves glmark -b desktop:effect=shadow:windows=4 by 27% Improves glmark -b desktop:blur-radius=5:effect=blur:passes=1:separable=true:windows=4 by 17% While I haven't tested other apps, this should help X rendering a lot, and I've heard GLBenchmark needed it too.
* vc4: Move the render job state into a separate structure.Eric Anholt2016-09-141-1/+2
| | | | | This is a preparation step for having multiple jobs being queued up at the same time.
* vc4: Add support for dumping executed commands to a file.Eric Anholt2015-12-151-0/+89
| | | | | | | | | | The VC4_DEBUG=cl,qpu is nice and all, but I want to be able to get more detailed dumps, and to replay the same exact commands in simulation. For that I need a dump with all of the VBOs, shaders, shader recs, etc. This dump can be parsed by vc4-gpu-tools. For now this is only doable from simulator mode, because otherwise we don't have access to the RCL contents generated by the kernel.
* vc4: Add the RCL to CL debug dumping when in simulator mode.Eric Anholt2015-12-031-0/+6
| | | | | | We can't dump it in the real driver, since the kernel doesn't give us a handle to it (except after a GPU hang, using a root ioctl). In the simulator we can.
* vc4: Add a sentinel after simulator buffers for buffer overflow detection.Eric Anholt2015-10-231-1/+11
| | | | | | | | | This is a little bit like the mprotect-based fencing I've experimented with, but it's simple and low overhead. The downside is that only catches writes, not reads. It didn't catch any bad writes on a current piglit run, but may be useful in the future.
* vc4: Fix a memory leak in the simulator case.Eric Anholt2015-10-061-1/+6
| | | | We validate per draw call, and need to free the shader per draw call, too.
* vc4: Simplify vc4_use_bo and make sure it's not a shader.Eric Anholt2015-07-281-3/+3
| | | | | | | Since the conversion to keeping validated shaders around for the BO's lifetime, we haven't been checking that rendering doesn't happen to shaders. Make vc4_use_bo check that always, and just don't use it for the VC4_MODE_SHADER case (so now modes are unused)
* vc4: Keep the validated shader around for the simulator execution.Eric Anholt2015-07-281-0/+10
| | | | This more closely matches the kernel behavior on shader validation now.
* vc4: Move tile state/alloc allocation into the kernel.Eric Anholt2015-06-171-0/+1
| | | | | | | This avoids a security issue where userspace could have written the tile state/tile alloc behind the GPU's back, and will apparently be necessary for fixing stability bugs (tile state buffers are missing some top bits for the tile alloc's address).
* vc4: Handle refcounting the exec BO like we do in the kernel.Eric Anholt2015-06-161-5/+11
| | | | | This reduces the diff to the kernel, and will be useful when I make the kernel allocate more BOs as part of validation.
* vc4: Allow submitting jobs with no bin CL in validation.Eric Anholt2015-04-131-8/+10
| | | | | | For blitting, we want to fire off an RCL-only job. This takes a bit of tweaking in our validation and the simulator support (and corresponding new code in the kernel).
* vc4: Update to current kernel sources.Eric Anholt2015-02-241-3/+3
| | | | | | New BO create and mmap ioctls are added. The submit ABI gains a flags argument, and the pointers are fixed at 64-bit. Shaders are now fixed at the start of their BOs.
* vc4: Fix leak of simulator memory on screen cleanup.Eric Anholt2014-12-141-1/+3
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* vc4: Fix a leak of the simulator's exec BO's actual vc4_bo.Eric Anholt2014-12-141-0/+1
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* vc4: Make some assertions about how many flushes/EOFs the simulator sees.Eric Anholt2014-10-171-2/+19
| | | | This caught the previous commit's bug in the kernel validator.
* vc4: Move the mirrored kernel code to a kernel/ directory.Eric Anholt2014-10-091-120/+2
| | | | Now this whole setup matches the kernel's file layout much more closely.
* vc4: Fix segfaults when rendering with no color render target.Eric Anholt2014-09-091-5/+5
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* vc4: Include stdio/stdlib in headers so I don't have to include it per file.Eric Anholt2014-08-221-2/+0
| | | | | There are a few tools I want to have always available, and fprintf() and abort() are among them.
* vc4: Move the deref of the color buffer for simulator into the simulator.Eric Anholt2014-08-151-2/+2
| | | | | | | At some point I'm going to want to move the information necessary for the host buffer upload/download into the BO so that it's independent of the current vc4->framebuffer, but for now this fixes pointless derefs on non-simulator in vc4_context.c since the dump_fbo() removal
* vc4: Improve simulator memory allocation.Eric Anholt2014-08-111-4/+20
| | | | This should reduce a bunch of spurious failures in sim.
* vc4: Stash some debug code for looking at what BOs are at what hindex.Eric Anholt2014-08-111-0/+4
| | | | When you're debugging validation, it's nice to know what the BOs are for.
* vc4: Use GEM under simulation even for non-winsys BOs.Eric Anholt2014-08-111-0/+1
| | | | | | | In addition to reducing sim-specific code, it also avoids our local handle allocation conflicting with the host GEM's handle numbering, which was causing vc4_gem_hindex() to not distinguish between winsys BOs and the same-numbered non-winsys bo.
* vc4: Validate that the same BO doesn't get reused for different purposes.Eric Anholt2014-08-111-4/+3
| | | | | | | | | We don't care if things like vertex data get smashed by render target data, but we do need to make sure that shader code doesn't get rendered to. v2: Fix overflowing read of gl_relocs[] that incorrect flagged of some VBOs as shader code.
* vc4: Compute the proper end address of the relocated command lists.Eric Anholt2014-08-111-2/+0
| | | | | | | | | render_cl_size/bin_cl_size includes relocations, while the hardware buffer doesn't. If you don't emit a HALT packet, the command parser continues until the end register's value. We can't allow executing unvalidated buffer contents (and it's actually harmful in the render lists Mesa is emitting, since VC4_PACKET_STORE_MS_TILE_BUFFER_AND_EOF doesn't trigger a halt).
* vc4: Rename fields in the kernel interface.Eric Anholt2014-08-111-18/+18
| | | | | I decided I didn't like "len" compared to "size", and I keep typing shader_rec instead of shader_record[s] elsewhere, so make it consistent.
* vc4: Fix things to validate more than one shader state in a submit.Eric Anholt2014-08-111-9/+8
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* vc4: Rewrite the kernel ABI to support texture uniform relocation.Eric Anholt2014-08-111-11/+26
| | | | | | | | | | This required building a shader parser that would walk the program to find where the texturing-related uniforms are in the uniforms stream. Note that as of this commit, a new kernel is required for rendering on actual VC4 hardware (currently that commit is named "drm/vc4: Introduce shader validation and better command stream validation.", but is likely to be squashed as part of an eventual merge of the kernel driver).
* vc4: Switch simulator to using kernel validatorEric Anholt2014-08-111-24/+210
| | | | | | | | This ensures that when I'm using the simulator, I get a closer match to what behavior on real hardware will be. It lets me rapidly iterate on the kernel validation code (which otherwise has a several-minute turnaround time), and helps catch buffer overflow bugs in the userspace driver faster.
* vc4: Initial skeleton driver import.Eric Anholt2014-08-081-0/+96
This mostly just takes every draw call and turns it into a sequence of commands that clear the FBO and draw a single shaded triangle to it, regardless of the actual input vertices or shaders. I copied the initial driver skeleton mostly from freedreno, and I've preserved Rob Clark's copyright for those. I also based my initial hardcoded shaders and command lists on Scott Mansell (phire)'s "hackdriver" project, though the bit patterns of the shaders emitted end up being different. v2: Rebase on gallium megadrivers changes. v3: Rebase on PIPE_SHADER_CAP_MAX_CONSTS change. v4: Rely on simpenrose actually being installed when building for simulation. v5: Add more header duplicate-include guards. v6: Apply Emil's review (protection against vc4 sim and ilo at the same time, and dropping the dricommon drm bits) and fix a copyright header (thanks, Roland)
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