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* vc4: Track the number of BOs allocated and their size.Eric Anholt2015-06-171-0/+6
| | | | This is useful for BO leak debugging.
* vc4: Drop qir include from vc4_screen.hEric Anholt2015-06-091-1/+1
| | | | | We didn't need any of it except for the list header, and qir.h pulls in nir.h, which is not really interesting to winsys.
* vc4: Convert from simple_list.h to list.hEric Anholt2015-05-291-2/+2
| | | | list.h is a nicer and more familiar set of list functions/macros.
* vc4: Convert to consuming NIR.Eric Anholt2015-04-011-0/+1
| | | | | | | | | | | | | | | | | | | NIR brings us better optimization than I would have bothered to write within the driver, developers sharing future optimization work, and the ability to share device-specific lowering code that we and other GLES2-level drivers need. total uniforms in shared programs: 13421 -> 13422 (0.01%) uniforms in affected programs: 62 -> 63 (1.61%) total instructions in shared programs: 39961 -> 39707 (-0.64%) instructions in affected programs: 15494 -> 15240 (-1.64%) v2: Add missing imov support, and assert that there are no dest saturates. v3: Rebase on the target-specific algebraic series. v4: Rebase on gallium-includes-from-NIR changes in mater. v5: Rebase on variables being in lists instead of hash tables. v6: Squash in intermediate changes that used the NIR-to-TGSI pass (which I'm not committing)
* vc4: Add a userspace BO cache.Eric Anholt2014-12-171-0/+12
| | | | | | | | | | Since our kernel BOs require CMA allocation, and the use of them requires new mmaps, it's pretty expensive and we should avoid it if possible. Copying my original design for Intel, make a userspace cache that reuses BOs that haven't been shared to other processes but frees BOs that have sat in the cache for over a second. Improves glxgears framerate on RPi by around 30%.
* vc4: Drop a weird argument in the BOs-from-handles API.Eric Anholt2014-12-171-2/+1
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* vc4: Add a debug flag for waiting for sync on submit.Eric Anholt2014-12-051-0/+1
| | | | | This is nice when you're tracking down which command list is hanging the GPU.
* vc4: Update for new kernel ABI with async execution and waits.Eric Anholt2014-11-201-0/+13
| | | | | Our submits now return immediately and you have to manually wait for things to complete if you want to (like a normal driver).
* vc4: Add a debug flag for flushing after every draw.Eric Anholt2014-09-091-0/+1
| | | | | It was useful on i965, but it's even more useful for debugging tiled renderers.
* vc4: Add support for texture tiling.Eric Anholt2014-08-221-2/+0
| | | | | | This still treats everything as RGBA8888 for the most part, same as before. This is a prerequisite for handling other texture formats, since only RGBA8888 has a raster-layout mode.
* vc4: Add support for swizzling of texture colors.Eric Anholt2014-08-181-0/+1
| | | | | Fixes swapped colors on the copypix demo and some piglit tests like pbo-teximage-tiling .
* vc4: Fix off-by-one in texture maximum levels.Eric Anholt2014-08-121-1/+1
| | | | It's 2048x2048 that's the max, not 1024x1024.
* vc4: Switch simulator to using kernel validatorEric Anholt2014-08-111-1/+0
| | | | | | | | This ensures that when I'm using the simulator, I get a closer match to what behavior on real hardware will be. It lets me rapidly iterate on the kernel validation code (which otherwise has a several-minute turnaround time), and helps catch buffer overflow bugs in the userspace driver faster.
* vc4: Add VC4_DEBUG env optionEric Anholt2014-08-081-1/+9
| | | | | v2: Fix an accidental deletion of some characters from the copyright message (caught by Ilia Mirkin)
* vc4: Initial skeleton driver import.Eric Anholt2014-08-081-0/+63
This mostly just takes every draw call and turns it into a sequence of commands that clear the FBO and draw a single shaded triangle to it, regardless of the actual input vertices or shaders. I copied the initial driver skeleton mostly from freedreno, and I've preserved Rob Clark's copyright for those. I also based my initial hardcoded shaders and command lists on Scott Mansell (phire)'s "hackdriver" project, though the bit patterns of the shaders emitted end up being different. v2: Rebase on gallium megadrivers changes. v3: Rebase on PIPE_SHADER_CAP_MAX_CONSTS change. v4: Rely on simpenrose actually being installed when building for simulation. v5: Add more header duplicate-include guards. v6: Apply Emil's review (protection against vc4 sim and ilo at the same time, and dropping the dricommon drm bits) and fix a copyright header (thanks, Roland)