aboutsummaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers/vc4/vc4_qpu_emit.c
Commit message (Expand)AuthorAgeFilesLines
* tree-wide: replace MAYBE_UNUSED with ASSERTEDEric Engestrom2019-07-311-4/+4
* vc4: Clean up release build warnings using MAYBE_UNUSED.Eric Anholt2017-06-201-4/+4
* vc4: Fix math with a condition flag set.Eric Anholt2017-03-081-3/+10
* vc4: Avoid emitting small immediates for UBO indirect load address guards.Eric Anholt2017-02-101-0/+2
* vc4: Restructure texture insts as ALU ops with tex_[strb] as the dst.Eric Anholt2016-11-291-16/+23
* vc4: Refactor qir_get_op_nsrc(enum qop) to qir_get_nsrc(struct qinst *).Eric Anholt2016-11-291-2/+2
* vc4: Replace the qinst src[] with a fixed-size array.Eric Anholt2016-11-291-1/+1
* vc4: Flag the last thread switch in the program as the last.Eric Anholt2016-11-121-0/+18
* vc4: Use ra14/rb14 as the spilling registers.Eric Anholt2016-11-121-6/+6
* vc4: Add a thread switch QIR instruction.Eric Anholt2016-11-121-0/+6
* vc4: Don't abort when a shader compile fails.Eric Anholt2016-11-091-1/+4
* vc4: Add missing break statement.Eric Anholt2016-08-311-0/+1
* vc4: Add support for MUL output rotation.Eric Anholt2016-08-251-0/+14
* vc4: Add support for the 2-bit LOAD_IMM variants.Eric Anholt2016-08-251-0/+8
* vc4: Add a QIR value for the QPU element register.Eric Anholt2016-08-251-0/+4
* vc4: Fix GPU hangs with >16 varying values.Eric Anholt2016-08-241-19/+56
* vc4: Emit resets of the uniform stream at the starts of blocks.Eric Anholt2016-07-131-0/+8
* vc4: Move the QPU instructions to schedule into each block.Eric Anholt2016-07-131-97/+108
* vc4: Define a QIR branch instructionEric Anholt2016-07-121-0/+9
* vc4: Add a "qir_for_each_inst_inorder" macro and use it in many places.Eric Anholt2016-07-121-1/+1
* vc4: Add support for loading immediate values in QIR.Eric Anholt2016-05-061-0/+7
* vc4: Make sure that we don't overwrite the signal for PROG_END.Eric Anholt2016-05-061-0/+8
* vc4: Add whitespace after each program stage dump.Eric Anholt2016-05-021-0/+1
* vc4: Move FRAG_X/Y/REV_FLAG to a QFILE like VPM or TLB color writes.Eric Anholt2016-04-081-15/+14
* vc4: Allow TLB Z/color/stencil writes from any ALU operation in QIR.Eric Anholt2016-04-081-25/+22
* vc4: Handle SF on instructions that write r4.Eric Anholt2016-04-081-10/+14
* vc4: Move discard handling to the condition flag.Eric Anholt2016-03-161-16/+6
* vc4: Correct typo setting 'handled_qinst_cond'Rhys Kidd2016-02-151-1/+1
* vc4: Replace the SSA-style SEL operators with conditional MOVs.Eric Anholt2016-01-061-35/+14
* vc4: Add debugging of the estimated time to run the shader to shader-db.Eric Anholt2015-12-111-1/+11
* vc4: Add support for multisample framebuffer operations.Eric Anholt2015-12-081-0/+7
* vc4: Add support for storing sample mask.Eric Anholt2015-12-041-0/+8
* vc4: Add support for nir_op_uge, using the carry bit on QPU_A_SUB.Eric Anholt2015-11-171-0/+4
* vc4: Add support for copy propagation with unpack flags present.Eric Anholt2015-10-261-18/+43
* vc4: Rewrite the pack instructions as a MOV with a dst pack flagEric Anholt2015-10-261-19/+1
* vc4: Move dst pack setup out to a helper function with more asserts.Eric Anholt2015-10-261-10/+22
* vc4: Switch the unpack ops to being unpack flags on a mov.Eric Anholt2015-10-261-47/+10
* vc4: Drop some confused code about pack/unpack handling.Eric Anholt2015-10-261-23/+4
* vc4: Reduce MOV special-casing in QIR-to-QPU.Eric Anholt2015-10-261-8/+11
* vc4: Fix names of the 16-bit unpacksEric Anholt2015-10-241-2/+2
* vc4: Fix the test for skipping raw MOVs.Eric Anholt2015-10-241-1/+1
* vc4: Add QIR/QPU support for the 8-bit vector instructions.Eric Anholt2015-10-231-0/+5
* vc4: Fold the 16-bit integer pack into the instructions generating it.Eric Anholt2015-08-211-9/+5
* vc4: Pack the unorm-packing bits into a src MUL instruction when possible.Eric Anholt2015-08-201-0/+5
* vc4: Add a QIR helper for whether the op is a MUL type.Eric Anholt2015-08-201-4/+3
* vc4: Switch QPU_PACK_SCALED to be two non-SSA instructions.Eric Anholt2015-08-201-16/+7
* vc4: Make the pack-to-unorm instructions be non-SSA.Eric Anholt2015-08-201-22/+6
* vc4: Make r4-writes implicitly move to a temp, and allocate temps to r4.Eric Anholt2015-08-041-29/+29
* vc4: Fix compiler warnings on release builds.Eric Anholt2015-07-141-0/+1
* vc4: Swap around which src we spill to ra31/rb31.Eric Anholt2015-06-161-4/+4
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-30 10:29:22 +0000