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path: root/src/gallium/drivers/vc4/vc4_context.h
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* Revert "vc4: Lazily emit our FS/VS input loads."Eric Anholt2017-03-081-4/+4
* vc4: Lazily emit our FS/VS input loads.Eric Anholt2017-02-241-4/+4
* vc4: Flush the job early if we're referencing too many BOs.Eric Anholt2017-01-051-0/+7
* vc4: Try compiling our FSes in multithreaded mode on new kernels.Eric Anholt2016-11-161-0/+3
* vc4: Add support for ETC1 textures if the kernel is new enough.Eric Anholt2016-11-161-0/+4
* vc4: Mark threaded FSes as non-singlethread in the CL.Eric Anholt2016-11-121-0/+2
* vc4: Add support for register allocation for threaded shaders.Eric Anholt2016-11-121-4/+5
* vc4: Don't abort when a shader compile fails.Eric Anholt2016-11-091-1/+7
* vc4: Move simulator memory management to a u_mm.h heap.Eric Anholt2016-10-211-0/+2
* vc4: Restructure the simulator mode.Eric Anholt2016-10-211-0/+11
* vc4: Fix simulator when more than one vc4_screen is opened.Eric Anholt2016-10-061-0/+1
* vc4: use the new parent/child pools for transfersNicolai Hähnle2016-10-051-1/+1
* vc4: Implement job shufflingEric Anholt2016-09-141-6/+33
* vc4: Move the render job state into a separate structure.Eric Anholt2016-09-141-18/+33
* vc4: Fix incorrect clearing of Z/stencil when cleared separately.Eric Anholt2016-09-141-0/+1
* gallium: switch drivers to the slab allocator in src/utilMarek Olšák2016-09-061-2/+2
* vc4: Add register allocation support for MUL output rotation.Eric Anholt2016-08-251-0/+1
* vc4: Avoid VS shader recompiles by keeping a set of FS inputs seen so far.Eric Anholt2016-08-041-7/+14
* vc4: Disable early Z with computed depth.Eric Anholt2016-07-261-0/+2
* vc4: Speed up glGenerateMipmaps by avoiding shadow baselevel.Eric Anholt2016-07-151-0/+1
* vc4: Drop VC4_DIRTY_TEXSTATE in favor of the per-stage flags.Eric Anholt2016-07-151-1/+0
* vc4: Remove dead dirty_samplers field.Eric Anholt2016-07-151-1/+0
* vc4: Drop the dead export_linkage array.Eric Anholt2016-05-171-5/+0
* vc4: Don't flush on read-only access of buffers read by the CL.Eric Anholt2016-04-181-1/+2
* vc4: Add support for drawing in MSAA.Eric Anholt2015-12-081-0/+11
* vc4: Convert blending to being done in 4x8 unorm normally.Eric Anholt2015-10-231-1/+4
* vc4: Add a workaround for HW-2116 (state counter wrap fails).Eric Anholt2015-10-231-3/+3
* vc4: use nir two-sided-color loweringBoyan Ding2015-10-061-1/+0
* vc4: convert from tgsi semantic/index to varying-slotEric Anholt2015-09-161-5/+4
* gallium: add flags parameter to pipe_screen::context_createMarek Olšák2015-08-261-1/+1
* vc4: Actually allow math results to allocate into r4.Eric Anholt2015-08-211-0/+1
* vc4: Make r4-writes implicitly move to a temp, and allocate temps to r4.Eric Anholt2015-08-041-0/+1
* vc4: Skip re-emitting the shader_rec if it's unchanged.Eric Anholt2015-07-281-1/+15
* vc4: Cache the texture p1 for the sampler.Eric Anholt2015-07-141-0/+11
* vc4: Cache texture p0/p1 setup for the sampler view.Eric Anholt2015-07-141-0/+12
* vc4: Move tile state/alloc allocation into the kernel.Eric Anholt2015-06-171-3/+0
* vc4: Move RCL generation into the kernel.Eric Anholt2015-06-171-1/+14
* vc4: Just stream out fallback IB contents.Eric Anholt2015-05-271-0/+2
* vc4: Hook up VC4_DEBUG=perf to some useful printfs.Eric Anholt2015-04-151-0/+5
* vc4: Move the blit code to a separate file.Eric Anholt2015-04-131-0/+1
* vc4: Separate out a bit of code for submitting jobs to the kernel.Eric Anholt2015-04-131-0/+3
* vc4: Make a new #define for making code conditional on the simulator.Eric Anholt2015-03-241-0/+6
* vc4: Fix up statechange management for uncompiled/compiled FS/VS.Eric Anholt2015-01-111-5/+4
* vc4: Cook up the draw-time VPM setup info during shader compile.Eric Anholt2015-01-101-0/+6
* vc4: Only render tiles where the scissor ever intersected them.Eric Anholt2014-12-301-0/+10
* vc4: Fix leak of the compiled shader programs in the cache.Eric Anholt2014-12-141-0/+1
* vc4: Switch to using the util/ hash table.Eric Anholt2014-12-141-1/+1
* vc4: Update for new kernel ABI with async execution and waits.Eric Anholt2014-11-201-0/+3
* vc4: Add support for ARL and indirect register access on TGSI_FILE_CONSTANT.Eric Anholt2014-10-281-0/+23
* vc4: Refactor flushing before mapping a BO.Eric Anholt2014-10-241-1/+1
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