| Commit message (Collapse) | Author | Age | Files | Lines |
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Add support for providing an emulation callback function for arch/width
combinations that don't map cleanly to an x86 intrinsic.
Reviewed-by: Bruce Cherniak <[email protected]>
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Move x86 intrinsic lowering to a separate pass. Builder now instantiates
generic intrinsics for features not supported by llvm. The separate x86
lowering pass is responsible for lowering to valid x86 for the target
SIMD architecture. Currently it's a port of existing code to get it
up and running quickly. Will eventually support optimized x86 for AVX,
AVX2 and AVX512.
Reviewed-by: Bruce Cherniak <[email protected]>
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Removed preprocessor defines from structures passed to LLVM jitted code.
The python scripts do not understand the preprocessor defines and ignores
them. So for fields that are compiled out due to a preprocessor define
the LLVM script accounts for them anyway because it doesn't know what
the defines are set to. The sanitize defines for open source are fine
in that they're safely used.
Reviewed-by: Bruce Cherniak <[email protected]>
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Needed work for jit code debug.
Reviewed-by: Bruce Cherniak <[email protected]>
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Reviewed-by: Bruce Cherniak <[email protected]>
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Hook up archrast counters for shader stats: instructions executed.
Reviewed-by: Bruce Cherniak <[email protected]>
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Removing some code that doesn't seem to do anything meaningful.
Reviewed-by: Bruce Cherniak <[email protected]>
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Added a SWR_SHADER_STATS structure which is passed to each shader. The
stats pass will instrument the shader to populate this.
Reviewed-by: Bruce Cherniak <[email protected]>
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mem[offset] += value
This function will be heavily used by all stats intrinsics.
Reviewed-by: Bruce Cherniak <[email protected]>
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Fix slow permutes in PA tri lists under SIMD16 emulation on AVX
Added missing permute (interlane, immediate) to SIMDLIB
Reviewed-by: Bruce Cherniak <[email protected]>
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Finish up the remaining explicit intrinsic uses. At this point all
explicit Intrinsic::getDeclaration() usage has been replaced with auto
generated macros generated with gen_llvm_ir_macros.py. Going forward,
make sure to only use the intrinsics here, adding new ones as needed.
Next step is to remove all references to x86 intrinsics to keep the
builder target-independent. Any x86 lowering will be handled by a
separate pass.
Reviewed-by: Bruce Cherniak <[email protected]>
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Replace sqrt, maskload, fp min/max, cttz, ctlz with llvm equivalent.
Replace AVX maskedstore intrinsic with LLVM intrinsic. Add helper llvm
macros for stacksave, stackrestore, popcnt.
Reviewed-by: Bruce Cherniak <[email protected]>
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Start removing avx2 macros for functionality that exists in llvm.
Reviewed-by: Bruce Cherniak <[email protected]>
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for getting masked gather intrinsic (also compatible with LLVM 4)
Reviewed-by: Bruce Cherniak <[email protected]>
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Reviewed-by: Bruce Cherniak <[email protected]>
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Add stats for degenerate and backfacing primitive counts
Wire archrast stats for alpha blend and alpha test.
pass value to jitter, upon return have archrast event increment a value
Reviewed-by: Bruce Cherniak <[email protected]>
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Reviewed-by: Bruce Cherniak <[email protected]>
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Help support debug info in 16 wide shaders.
Reviewed-by: Bruce Cherniak <[email protected]>
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Stuff parameters into a blend context struct before passing down through
the PFN_BLEND_JIT_FUNC function pointer. Needed for stat changes.
Reviewed-by: Bruce Cherniak <[email protected]>
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Add assert for correct usage of memory accesses
v2: reworded commit message; renamed enum more appropriately
Reviewed-by: Bruce Cherniak <[email protected]>
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VPHADDD, PMAXUD, PMINUD
Reviewed-by: Bruce Cherniak <[email protected]>
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This is for parity with autotools.
Signed-off-by: Jan Alexander Steffens (heftig) <[email protected]>
Acked-by: Dylan Baker <[email protected]>
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util_is_power_of_two_or_zero
The new name make the zero-input behavior more obvious. The next
patch adds a new function with different zero-input behavior.
Signed-off-by: Ian Romanick <[email protected]>
Suggested-by: Matt Turner <[email protected]>
Reviewed-by: Alejandro Piñeiro <[email protected]>
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Reviewed-by: Emil Velikov <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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sched_yield is used but the include reference on Darwin is missing. This patch
conditionally guards on Darwin/OSX to import sched.h first.
Reviewed-by: Jeremy Huddleston Sequoia <[email protected]>
Reviewed-by: Bruce Cherniak <[email protected]>
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The implementation for bootstrapping SWR on Darwin targets is based on the Linux version.
Instead of reading the output of /proc/cpuinfo, sysctlbyname is used to determine the
physical identifiers, processor identifiers, core counts and thread-processor affinities.
With this patch, it is possible to use SWR as an alternate renderer on OSX to softpipe and
llvmpipe.
Reviewed-by: Jeremy Huddleston Sequoia <[email protected]>
Reviewed-by: Bruce Cherniak <[email protected]>
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targets."
This reverts commit de0d10db93d85de79c7b4451c4851ace2976f8f4.
This breaks the build on at least Linux, probably other non-apple
platforms.
Signed-off-by: Dylan Baker <[email protected]>
Reviewed-by: Adam Jackson <[email protected]>
Reviewed-by: Daniel Stone <[email protected]>
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This reverts commit 9dc5063262d0a5130cf0723a33079f3fd17560c3.
This breaks the build on at least Linux, probably other non-apple
platforms.
Signed-off-by: Dylan Baker <[email protected]>
Reviewed-by: Adam Jackson <[email protected]>
Reviewed-by: Daniel Stone <[email protected]>
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sched_yield is used but the include reference on Darwin is missing. This patch
conditionally guards on Darwin/OSX to import sched.h first.
Reviewed-by: Jeremy Huddleston Sequoia <[email protected]>
Signed-off-by: Jeremy Huddleston Sequoia <[email protected]>
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The implementation for bootstrapping SWR on Darwin targets is based on the Linux version.
Instead of reading the output of /proc/cpuinfo, sysctlbyname is used to determine the
physical identifiers, processor identifiers, core counts and thread-processor affinities.
With this patch, it is possible to use SWR as an alternate renderer on OSX to softpipe and
llvmpipe.
Reviewed-by: Jeremy Huddleston Sequoia <[email protected]>
Signed-off-by: Jeremy Huddleston Sequoia <[email protected]>
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Otherwise SWR cannot be built with meson from an autotools generated
tarball, such as the 18.0.0-rc4 tarball.
Fixes: 16bf81383080 ("meson/swr: re-shuffle generated files")
Signed-off-by: Dylan Baker <[email protected]>
Reviewed-by: George Kyriazis <[email protected]>
Reviewed-by: Emil Velikov <[email protected]>
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Reviewed-by: Bruce Cherniak <[email protected]>
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This is useful for archrast data collection. This greatly speeds up the
post processing script since there is significantly less events generated.
Finally, this is a simpler option to communicate to users than having
them directly adjust MAX_PRIMS_PER_DRAW and MAX_TESS_PRIMS_PER_DRAW.
Reviewed-by: Bruce Cherniak <[email protected]>
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Supports popcnt on vector masks (e.g. <8 x i1>)
Reviewed-by: Bruce Cherniak <[email protected]>
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Reviewed-by: Bruce Cherniak <[email protected]>
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Removed specific split draw events.
Reviewed-by: Bruce Cherniak <[email protected]>
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In the API event handler we want to share information between the core
layer and the API. Specifically, around associating various ids with
different kinds of events. For example, associate render pass id with
draw ids, or command buffer ids with draw ids.
Reviewed-by: Bruce Cherniak <[email protected]>
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Reviewed-by: Bruce Cherniak <[email protected]>
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Reviewed-by: Bruce Cherniak <[email protected]>
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Reviewed-by: Bruce Cherniak <[email protected]>
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The comment said it will only represent the lowest 32 regs. This was
not entirely true in practice, since at least on x86 you'll get
masked shifts (unless the compiler could recognize it already and toss
it out). It turns out this actually works out alright (presumably
noone uses it for temp regs) when increasing max sampler views, so
make that behavior explicit.
Albeit it feels a bit hacky (but in any case, explicit behavior there
is better than undefined behavior).
Reviewed-by: Jose Fonseca <[email protected]>
Reviewed-by: Brian Paul <[email protected]>
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Fixes: a25093de7188 ("swr/rast: Implement JIT shader caching to disk")
Signed-off-by: Vinson Lee <[email protected]>
Reviewed-by: Eric Engestrom <[email protected]>
Reviewed-By: George Kyriazis <[email protected]>
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Fixes piglit tests that broke with 8a64593bde
Reviewed-By: Bruce Cherniak <[email protected]>
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Fix clipper validMask setting. We don't need to run frustum rejected
primitives through the clipper. Perform frustum culling with only
frustum clip codes. Guardband clip codes cannot be used because they
overlap frustum codes.
Reviewed-By: Bruce Cherniak <[email protected]>
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Translate is now part of an overloaded LOAD call which required a change to
the code gen to skip the load functions in order to handle them manually
to make them virtual.
Reviewed-By: Bruce Cherniak <[email protected]>
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Generate more compact code from gen_llvm.hpp.
Reviewed-By: Bruce Cherniak <[email protected]>
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- Have the draw type sent to DrawInfoEvent in handlers created in
archrast.cpp. The draw type no longer needs to be sent during during
AR_API_EVENT() call in api.cpp.
- Remove draw type from event defintions in events_private.proto, no
longer needed
Reviewed-By: Bruce Cherniak <[email protected]>
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Reviewed-By: Bruce Cherniak <[email protected]>
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Populate pLastIndex, even for the non-indexed case. An zero pLastIndex
can cause the index offsets inside the fetcher to have non-sensical values
that can be either very large positive or very large negative numbers.
Reviewed-By: Bruce Cherniak <[email protected]>
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