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* gallium: add PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEXMarek Olšák2017-05-101-0/+1
| | | | | | | The next patch will use it. This is really for svga and GL2-level drivers. Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* gallium: remove pipe_index_buffer and set_index_bufferMarek Olšák2017-05-103-30/+15
| | | | | | | | | | | | | | pipe_draw_info::indexed is replaced with index_size. index_size == 0 means non-indexed. Instead of pipe_index_buffer::offset, pipe_draw_info::start is used. For indexed indirect draws, pipe_draw_info::start is added to the indirect start. This is the only case when "start" affects indirect draws. pipe_draw_info::index is a union. Use either index::resource or index::user depending on the value of pipe_draw_info::has_user_indices. v2: fixes for nine, svga
* gallium: decrease the size of pipe_vertex_buffer - 24 -> 16 bytesMarek Olšák2017-05-101-7/+7
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* swr: fix polygonmode for front==backGeorge Kyriazis2017-05-082-1/+27
| | | | | | | | | | | | | | | | | | | | Rasterizer core only supports polygonmode front==back. Add logic for populating fillMode for the rasterizer only for that case correctly. Provide enum conversion between mesa enums and core enums. The core renders lines/points as tris. Previously, code would enable stipple for polygonmode != FILL. Modify stipple enable logic so that this works correctly. No regressions in vtk tests. Fixes the following piglit tests: pointsprite gl-1.0-edgeflag-const v2: remove cc stable, and remove "not implemented" assert v3: modified commit message Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: support polygonmode pointGeorge Kyriazis2017-05-081-52/+116
| | | | | | | | | | | | | | | Add support for polygonmode point in the binner. This is done by splitting BinPostSetupPoints from BinPoints, so the earlier call can be called from BinTriangles. Setup has already been done at the time BinPostSetupPoints needs to be called. This checkin just adds support in the rasterizer. A separate checkin will add the appropriate driver support. v2: remove cc stable v3: modified commit message and subject line Reviewed-by: Bruce Cherniak <[email protected]>
* swr: move msaa resolve to generalized StoreTileBruce Cherniak2017-05-083-80/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v3: list piglit tests fixed by this patch. Fixed typo Tim pointed out. v2: Reword commit message to more closely adhere to community guidelines. This patch moves msaa resolve down into core/StoreTiles where the surface format conversion routines are available. The previous "experimental" resolve was limited to 8-bit unsigned render targets. This fixes a number of piglit msaa tests by adding resolve support for all the render target formats we support. Specifically: layered-rendering/gl-layer-render: fail->pass layered-rendering/gl-layer-render-storage: fail->pass multisample-formats *[2,4,8,16] gl_arb_texture_rg: crash->pass multisample-formats *[2,4,8,16] gl_ext_texture_snorm: crash->pass multisample-formats *[2,4,8,16] gl_arb_texture_float: fail->pass multisample-formats *[2,4,8,16] gl_arb_texture_rg-float: fail->pass MSAA is still disabled by default, but can be enabled with "export SWR_MSAA_MAX_COUNT=4" (1,2,4,8,16 are options) The default is 0, which is disabled. This patch improves the number of multisample-formats supported by swr, and fixes several crashes currently in the 17.1 branch. Therefore, it should be considered for inclusion in the 17.1 stable release. Being disabled by default, it poses no risk to most users of swr. Reviewed-by: Tim Rowley <[email protected]> cc: [email protected]
* swr/rast: add memory api to SwrGetInterface()Tim Rowley2017-04-286-28/+54
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: use gather instruction for odd format fetchTim Rowley2017-04-281-46/+9
| | | | | | | Small fetch performance optimization - use gather instruction for odd format fetch instead of slow emulated code. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: enable SIMD16 8x2 tile backendTim Rowley2017-04-281-1/+1
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: add SwrInit() to init backend/memory tablesTim Rowley2017-04-285-22/+26
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: increment depth/stencil tile pointer in SIMD16 BETim Rowley2017-04-281-1/+1
| | | | | | | Misplaced #endif preventing depth and stencil hot tile pointers from incrementing in SIMD16 8x2 configuration of BackendPixelRate. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: add SwrGetInterface() function to return apiTim Rowley2017-04-283-44/+151
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: enable per-warp scratch space for CSTim Rowley2017-04-288-8/+33
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: reduce simd{16}vertex stack for VS outputTim Rowley2017-04-282-16/+54
| | | | | | | | | | | | | | | Frontend - reduce simdvertex/simd16vertex stack usage for VS output in ProcessDraw, fixes stack overflow in some of the deeper call stacks under SIMD16. 1. Move the vertex store out of PA_FACTORY, and off the stack 2. Allocate the vertex store out of the aligned heap (pointer is temporarily stored in TLS, but will be migrated to thread pool along with other frontend temporary buffers). 3. Grow the vertex store as necessary for the number of verts per primitive, in chunks of 8/4 simdvertex/simd16vertex Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: remove default argument from SwrSync()Tim Rowley2017-04-281-1/+1
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: remove unused variables in the SIMD16 FETim Rowley2017-04-283-14/+2
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: move construction of const above gotoTim Rowley2017-04-281-2/+2
| | | | | | Fixes gcc error for SIMD16 FE. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: name threads to aid debuggingTim Rowley2017-04-284-2/+126
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: disable buffer overrun warning for Assemble()Tim Rowley2017-04-281-2/+4
| | | | | | | | Disabling buffer overrun warning for Assemble(uint32_t slot, simdvector *verts) due to what looks like a MSVC compiler bug when compiling the SIMD16 FE. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: clean up clipper commentsTim Rowley2017-04-281-2/+2
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: add SIMDAPI decorators in binner/clipperTim Rowley2017-04-282-6/+6
| | | | | | Fixes MSVC errors with SIMD16 FE. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: add additional jit utility functionsTim Rowley2017-04-284-1/+76
| | | | | | Not used yet. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: more flexible max attribute slotsTim Rowley2017-04-287-27/+30
| | | | | | | | | | | Ability to allocate space for an arbitrary number (at compile time) of positions in the vertex layout. Removes KNOB_NUM_ATTRIBUTES from knobs.h, replaces the VTX slot number #defines with the SWR_VTX_SLOTS enum (which contains replacement for NUM_ATTRIBUTES: SWR_VTX_NUM_SLOTS) Reviewed-by: Bruce Cherniak <[email protected]>
* gallium: fold u_trim_pipe_prim call from st/mesa to driversMarek Olšák2017-04-201-0/+5
| | | | | | | Most drivers don't need it and shouldn't need it because it can't be used in some cases (indirect draws, primitive restart, count from streamout). Reviewed-by: Brian Paul <[email protected]>
* swr: simd16 vs workTim Rowley2017-04-191-5/+25
| | | | | | | Build VS with alternating output for the current simd16 fe double-pump of a simd8 shader. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: Add polygon stipple supportGeorge Kyriazis2017-04-145-9/+84
| | | | | | | | | Add polygon stipple functionality to the fragment shader. Explicitly turn off polygon stipple for lines and points, since we do them using tris. Reviewed-by: Bruce Cherniak <[email protected]>
* gallium: add PIPE_CAP_TGSI_TES_LAYER_VIEWPORTNicolai Hähnle2017-04-141-0/+1
| | | | | Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* swr: Enable MSAA in OpenSWR software rendererBruce Cherniak2017-04-146-25/+313
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables multisample antialiasing in the OpenSWR software renderer. MSAA is a proof-of-concept/work-in-progress with bug fixes and performance on the way. We wanted to get the changes out now to allow several customers to begin experimenting with MSAA in a software renderer. So as not to impact current customers, MSAA is turned off by default - previous functionality and performance remain intact. It is easily enabled via environment variables, as described below. It has only been tested with the glx-lib winsys. The intention is to enable other state-trackers, both Windows and Linux and more fully support FBOs. There are 2 environment variables that affect behavior: * SWR_MSAA_FORCE_ENABLE - force MSAA on, for apps that are not designed for MSAA... Beware, results will vary. This is mainly for testing. * SWR_MSAA_MAX_SAMPLE_COUNT - sets maximum supported number of samples (1,2,4,8,16), or 0 to disable MSAA altogether. (The default is currently 0.) Reviewed-by: George Kyriazis <[email protected]>
* swr: Removed unnecessary PIPE_BIND flags from swr_is_format_supportedBruce Cherniak2017-04-141-2/+1
| | | | | | | | | Removed unnecessary and probably wrong PIPE_BIND_SCANOUT and PIPE_BIND_SHARED flags in favor of check on single PIPE_BIND_DISPLAY_TARGET flag. Reference llvmpipe change <bee4c7718a3bd57e3d99f0913d9081cd13fe5fd> Reviewed-by: Tim Rowley <[email protected]>
* swr: Align swr_context allocation to SIMD alignment.Bruce Cherniak2017-04-141-2/+5
| | | | | | | | | The context now contains SIMD vectors which must be aligned (specifically samplePositions in the rastState in the derived state). Failure to align can result in segv crash on unaligned memory access in vector instructions. Reviewed-by: Tim Rowley <[email protected]>
* swr: add linux to scons buildGeorge Kyriazis2017-04-141-6/+1
| | | | | | Make swr compile for both linux and windows. Reviewed-by: Tim Rowley <[email protected]>
* swr: [rasterizer core] Disable 8x2 tile backendTim Rowley2017-04-111-1/+1
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer common] Add _simd_testz_si aliasTim Rowley2017-04-111-0/+1
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer archrast] Fix archrast for MSVC 2017 compilerTim Rowley2017-04-115-6/+6
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer jitter] Remove unused functionTim Rowley2017-04-112-35/+0
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer jitter] Remove HAVE_LLVM tests supporting llvm < 3.8Tim Rowley2017-04-114-52/+0
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer common/core] Fix 32-bit windows buildTim Rowley2017-04-116-117/+123
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] Fix unused variable warningsTim Rowley2017-04-113-10/+1
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] Code formating changeTim Rowley2017-04-111-10/+10
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] SIMD16 Frontend WIP - PATim Rowley2017-04-111-22/+22
| | | | | | Fix PA NextPrim for SIMD8 on SIMD16. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] SIMD16 Frontend WIP - ClipperTim Rowley2017-04-115-124/+941
| | | | | | Implement widened clipper for SIMD16. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] Multisample sample position setup changeTim Rowley2017-04-113-75/+92
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] Reduce templates to speed compileTim Rowley2017-04-113-10/+71
| | | | | | | Quick patch to remove some unused template params to cut down rasterizer compile time. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: return true for PIPE_CAP_DOUBLESTim Rowley2017-04-111-0/+1
| | | | Reviewed-by: Ilia Mirkin <[email protected]>
* swr: fix unused variable warningsTim Rowley2017-04-072-2/+0
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] SIMD16 Frontend WIPTim Rowley2017-04-054-75/+1299
| | | | | | Implement widened binner for SIMD16 Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] Enable 8x2 backendTim Rowley2017-04-051-1/+1
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer codegen] remove copy of makoTim Rowley2017-04-0518-7201/+0
| | | | | | | | mako is already a mesa build requirement, extra copy not needed. Tested building against mesa build baseline (mako-0.8.0). Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core/memory] Move intrinics to _simd functionsTim Rowley2017-04-055-117/+112
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] Programmable sample position supportTim Rowley2017-04-0512-596/+267
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
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