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* swr/rast: Implement Early Rasterization optimizationGeorge Kyriazis2018-01-194-0/+388
| | | | | | | | | | | | | | | Early Rasterization is an optimization for small triangles. Scientific workloads often contain very small triangles that has non-zero area and cannot be trivially rejected as falling between pixel centers, but does not cover any pixel center. Those triangles can be initially rasterized as early as in binner and rejected if they cover no pixels The optimization can be disabled in compilation using KNOB_ENABLE_EARLY_RAST option in knobs.h The Early Rast is disabled by default. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Enable simd16 vertex shadersGeorge Kyriazis2018-01-191-2/+2
| | | | | | | | | | | Flip the switch(es) to enable simd16 vertex shaders: USE_SIMD16_SHADERS and USE_SIMD16_VS Both have to be enabled at the same time. Currently, just setting USE_SIMD16_SHADERS does not work correctly. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: Support simd16 vertex shadersGeorge Kyriazis2018-01-193-21/+30
| | | | | | | | | | | | | | | Supporting simd16 vertex shaders involves packing the output of the fetch shader appropriately, especially the vertexID buffers that have to be formatted in one simd16 register, needed by the VS. As part of this support, we needed to remove the 2nd JitManager, since it was not accounting for vector width correctly. USE_SIMD16_SHADERS is also split into two defines. The additional one (USE_SIMD16_VS) controls the width of the vertex shader (VS), while the original one (USE_SIMD16_SHADERS) controls overall front end width. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: changed jit debug magic numberGeorge Kyriazis2018-01-191-1/+1
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Added ICLAMP builder functionGeorge Kyriazis2018-01-192-3/+3
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Jit debug workGeorge Kyriazis2018-01-191-30/+81
| | | | | | Properly validate DLL matches OBJ for jitted function Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: silence generated file warningsGeorge Kyriazis2018-01-191-0/+1
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: jit shader lib debug workGeorge Kyriazis2018-01-192-0/+11
| | | | | | Create shader_lib during build, link with shaders at DLL generation time Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: AVX-512 changes to enable 16-wide VSGeorge Kyriazis2018-01-194-8/+29
| | | | | | | | | | | | | | Add a new define (USE_SIMD16_VS), to denote calling a 16-wide vertex shader. This is needed because the mesa driver can do 16-wide shaders, but rasty cannot yet, so we need to distinguish. Create a new VertexID entry (VertexID16) for the USE_SIMD16_VS case, since we need to format the vertex id in a way that is digestible by the 16-wide VS Disabled for now. To be enabled in a future checkin when driver work is complete. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: x86 autogenerated macro workGeorge Kyriazis2018-01-194-14/+15
| | | | | | | Add name argument to x86 autogenerated macros. Add useful variable names for DCL_inputVec implementation. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Shorten some filenamesGeorge Kyriazis2018-01-192-2/+2
| | | | | | in shader and fetch dump files Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: work supporting optimizations in Debug builds.George Kyriazis2018-01-192-9/+23
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Add debugging type support for function types.George Kyriazis2018-01-192-0/+21
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Shader debugging workGeorge Kyriazis2018-01-191-0/+6
| | | | | | | - Move debug .ll files to JIT_CACHE_DIR - Don't link against jitter SRGBLut table, add global data to shader that needs it. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Debug Symbols workGeorge Kyriazis2018-01-194-19/+88
| | | | | | | Added support for Fetch / Sample / LD functions Added DLL link to JitCache implementation Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Initial work for debugging support.George Kyriazis2018-01-196-16/+191
| | | | | | | | | | Adds ability to step into jitted llvm IR in Visual Studio. - Updated llvm type generation script to also generate corresponding debug types. - New module pass inserts debug metadata into the IR for each function Disabled by default. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Add private state parameter in fetcherGeorge Kyriazis2018-01-195-29/+41
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Added missing define for Linux/gccGeorge Kyriazis2018-01-191-0/+1
| | | | | | + ZeroMemory() macro definition for non win32-compilation in common/os.h Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Fix one more invalid object format for windows.George Kyriazis2018-01-191-1/+1
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: allow a single swr architecture to be builtinChuck Atkins2018-01-191-35/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | Part 2 of 2 (part 1 is autoconf changes, part 2 is C++ changes) When only a single SWR architecture is being used, this allows that architecture to be builtin rather than as a separate libswrARCH.so that gets loaded via dlopen. Since there are now several different code paths for each detected CPU architecture, the log output is also adjusted to convey where the backend is getting loaded from. This allows SWR to be used for static mesa builds which are still important for large HPC environments where shared libraries can impose unacceptable application startup times as hundreds of thousands of copies of the libs are loaded from a shared parallel filesystem. Based on an initial implementation by Tim Rowley. v2: Refactor repetitive preprocessor checks to reduce code duplication v3: Formatting changes per Bruce C. Also delay screen creation until end to avoid leaks when failure conditions are hit. Signed-off-by: Chuck Atkins <[email protected]> Reviewed-by: Bruce Cherniak <[email protected]> CC: Tim Rowley <[email protected]> Reviewed-by: Bruce Cherniak <[email protected]>
* swr: (autoconf) allow a single swr architecture to be builtinChuck Atkins2018-01-191-11/+39
| | | | | | | | | | | | | | | | | | | | | | | | Part 1 of 2 (part 1 is autoconf changes, part 2 is C++ changes) When only a single SWR architecture is being used, this allows that architecture to be builtin rather than as a separate libswrARCH.so that gets loaded via dlopen. Since there are now several different code paths for each detected CPU architecture, the log output is also adjusted to convey where the backend is getting loaded from. This allows SWR to be used for static mesa builds which are still important for large HPC environments where shared libraries can impose unacceptable application startup times as hundreds of thousands of copies of the libs are loaded from a shared parallel filesystem. Based on an initial implementation by Tim Rowley. v2: Fix comment placement pointed out by Bruce C. Signed-off-by: Chuck Atkins <[email protected]> Reviewed-by: Bruce Cherniak <[email protected]> CC: Tim Rowley <[email protected]> Reviewed-by: Bruce Cherniak <[email protected]>
* swr: fix clang 5 null cast warningGreg V2018-01-191-3/+3
| | | | | Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Bruce Cherniak <[email protected]>
* gallium: remove PIPE_CAP_USER_CONSTANT_BUFFERSMarek Olšák2018-01-171-1/+0
| | | | | Reviewed-by: Roland Scheidegger <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* gallium: remove PIPE_CAP_TEXTURE_SHADOW_MAPMarek Olšák2018-01-171-1/+0
| | | | | Reviewed-by: Roland Scheidegger <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* gallium: remove PIPE_CAP_TWO_SIDED_STENCILMarek Olšák2018-01-171-1/+0
| | | | | Reviewed-by: Roland Scheidegger <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* meson: add llvm dependency for swr buildGeorge Kyriazis2018-01-171-0/+1
| | | | Reviewed-by: Dylan Baker <[email protected]>
* swr: Handle indirect indices in GSGeorge Kyriazis2018-01-101-8/+39
| | | | | | | | | | | | | | | BuilderSWR::swr_gs_llvm_fetch_input() (and consequently swr_gs_llvm_fetch_input()), did not handle the case where is_vindex_indirect or is_aindex_direct is set. Implement it, using the code in draw_llvm.c as a guideline. Fixes the following piglit tests: dynamic_input_array_index (crash) gs-input-array-vec4-index-rd vs-output-array-vec4-index-wr-before-gs Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: switch win32 jit format to COFFTim Rowley2018-01-101-2/+2
| | | | | | Allows for call-stack and exception handling for jitted functions. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: don't use 32-bit gathers for elements < 32-bits in sizeTim Rowley2018-01-101-1/+60
| | | | | | | | Using a gather for elements less than 32-bits in size can cause pagefaults when loading the last elements in a page-aligned-sized buffer. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: autogenerate named structs instead of literal structsTim Rowley2018-01-101-8/+15
| | | | | | Results in far smaller and useful IR output. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: SIMD16 fetch shader jitter cleanupTim Rowley2018-01-101-720/+368
| | | | | | | | Bake in USE_SIMD16_BUILDER code paths (for USE_SIMD16_SHADER defined), remove USE_SIMD16_BUILDER define, remove deprecated psuedo-SIMD16 code paths. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: shuffle header files for msvc pre-compiled header usageTim Rowley2018-01-1010-88/+143
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: SIMD16 builder - cleanup naming (simd2 -> simd16)Tim Rowley2018-01-105-233/+239
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* meson: Build SWR driverDylan Baker2018-01-082-0/+447
| | | | | | | | | | | | | | | | | This enables the SWR driver, but doesn't actually hook it up to any of the targets yet. I felt like this patch was big and complicated enough without adding that. v2: - Fix typo 'delemeited' -> 'delimited' (Eric E) - Fix type 'errror' -> 'error' (Eric E) - Use variables to hold files instead of looking above the current meson build (Eric E) - Use foreach loops to reduce the number of unique generators - Add comment about why some generators have names and some are just added to a list v3: - Remove trailing whitespace Signed-off-by: Dylan Baker <[email protected]>
* swr/rast: fix invalid sign masks in avx512 simdlib codeTim Rowley2018-01-043-3/+3
| | | | | | | Should be 0x80000000 instead of 0x8000000. Cc: [email protected] Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: fix MemoryBuffer build break for llvm-6Tim Rowley2018-01-031-0/+4
| | | | | | | | LLVM api change. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104381 Tested-by: Laurent Carlier <[email protected]> Reviewed-By: Bruce Cherniak <[email protected]>
* gallium: plumb context priority through to driverRob Clark2017-12-191-0/+1
| | | | | | | | Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Andres Rodriguez <[email protected]> Reviewed-by: Wladimir J. van der Laan <[email protected]>
* swr: Account for index_bias in offsetsGeorge Kyriazis2017-12-181-3/+3
| | | | | | | | | | When calculating buffer offsets for client buffers account for info.index_bias. Fixes the follow piglit tests: arb_draw_elements_base_vertex-drawelements-user_varrays arb_draw_elements_base_vertex-negative-index-user_varrays Reviewed-By: Bruce Cherniak <[email protected]>
* swr/rast: Move more RTAI handling out of binnerTim Rowley2017-12-152-12/+2
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: EXTRACT2 changed from vextract/vinsert to vshuffleTim Rowley2017-12-153-61/+32
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Fix cache of API thread event managerTim Rowley2017-12-151-1/+1
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Replace VPSRL with LSHRTim Rowley2017-12-154-41/+4
| | | | | | | | Replace use of x86 intrinsic with general llvm IR instruction. Generates the same final assembly. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Rework thread binding parameters for machine partitioningTim Rowley2017-12-157-88/+322
| | | | | | | | | | | | | Add BASE_NUMA_NODE, BASE_CORE, BASE_THREAD parameters to SwrCreateContext. Add optional SWR_API_THREADING_INFO parameter to SwrCreateContext to control reservation of API threads. Add SwrBindApiThread() function to allow binding of API threads to reserved HW threads. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Pull of RTAI gather & offset out of clip/bin codeTim Rowley2017-12-157-146/+203
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Remove no-op VBROADCAST of vIDTim Rowley2017-12-151-2/+2
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: SIMD16 Fetch - Fully widen 32-bit integer vertex componentsTim Rowley2017-12-154-17/+109
| | | | | | Also widen the 16-bit a 8-bit integer vertex component gathers to SIMD16. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Replace INSERT2 vextract/vinsert with JOIN2 vshuffleTim Rowley2017-12-153-105/+30
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: SIMD16 Fetch - Fully widen 16-bit float vertex componentsTim Rowley2017-12-151-7/+48
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: SIMD16 Fetch - Fully widen 32-bit float vertex componentsTim Rowley2017-12-154-32/+194
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Pass prim to ClipSimdTim Rowley2017-12-151-5/+5
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
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