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* gallium: Create a new PIPE_CAP_TILE_RASTER_ORDER for vc4.Eric Anholt2017-10-101-0/+1
| | | | | | | | | | | | | | | | Because vc4 can control the order that tiles are rasterized in, we can use it to implement overlapping blits using normal drawing and GL_ARB_texture_barrier, as long as we can tell the kernel what order to render the tiles in. This commit introduces the core gallium support, vc4 changes will follow. v2: Fix on the simulator. v3: Add the cap (disabled) to other drivers, add rst docs for the cap. v4: Rebase on PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS v5: Drop vc4 changes from this commit, for clarity. Reviewed-by: Nicolai Hähnle <[email protected]> (v3)
* swr/rast: use proper alignment for debug transposedPrimsTim Rowley2017-10-061-2/+2
| | | | | | | | Causing a crash in ParaView waveletcontour.py test when _DEBUG defined due to vector aligned copy with unaligned address. Reviewed-by: Bruce Cherniak <[email protected]>
* gallium: add PIPE_CAP_TGSI_ANY_REG_AS_ADDRESSMarek Olšák2017-10-061-0/+1
| | | | | Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium: Remove util_format_s3tc_init()Matt Turner2017-10-021-2/+0
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* gallium: Remove util_format_s3tc_enabledMatt Turner2017-10-021-4/+0
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* swr/rast: do not crash on NULL strings returned by getenvEmil Velikov2017-10-021-1/+2
| | | | | | | | | | | | | | | | | | | | The current convenience function GetEnv feeds the results of getenv directly into std::string(). That is a bad idea, since the variable may be unset, thus we feed NULL into the C++ construct. The latter of which is not allowed and leads to a crash. v2: Better variable name, implicit char* -> std::string conversion (Eric) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101832 Fixes: a25093de718 ("swr/rast: Implement JIT shader caching to disk") Cc: Tim Rowley <[email protected]> Cc: Laurent Carlier <[email protected]> Cc: Bernhard Rosenkraenzer <[email protected]> [Emil Velikov: make an actual commit from the misc diff] Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> (v1) Reviewed-by: Laurent Carlier <[email protected]> (v1)
* swr: Remove unneeeded comparisonGeorge Kyriazis2017-09-261-2/+1
| | | | | | No need to check if screen->pipe != pipe, so we can just assign it. Just do it. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: Handle resource across context changesGeorge Kyriazis2017-09-264-10/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Swr caches fb contents in tiles. Those tiles are stored on a per-context basis. When switching contexts that share resources we need to make sure that the tiles of the old context are being stored and the tiles of the new context are being invalidated (marked as invalid, hence contents need to be reloaded). The context does not get any dirty bits to identify this case. This has to be, then, coordinated by the resources that are being shared between the contexts. Add a "curr_pipe" hook in swr_resource that will allow us to identify a MakeCurrent of the above form during swr_update_derived(). At that time, we invalidate the tiles of the new context. The old context, will need to have already store its tiles by that time, which happens during glFlush(). glFlush() is being called at the beginning of MakeCurrent. So, the sequence of operations is: - At the beginning of glXMakeCurrent(), glFlush() will store the tiles of all bound surfaces of the old context. - After the store, a fence will guarantee that the all tile store make it to the surface - During swr_update_derived(), when we validate the new context, we check all resources to see what changed, and if so, we invalidate the current tiles. Fixes rendering problems with CEI/Ensight. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Handle instanceID offset / Instance Stride enableTim Rowley2017-09-251-7/+39
| | | | | | | | | | Supported in JitGatherVertices(); FetchJit::JitLoadVertices() may require similar changes, will need address this if it is determined that this path is still in use. Handle Force Sequential Access in FetchJit::Create. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Remove code supporting legacy llvm (<3.9)Tim Rowley2017-09-253-105/+15
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Fix allocation of DS output data for USE_SIMD16_FRONTENDTim Rowley2017-09-251-10/+6
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Slightly more efficient blend jitTim Rowley2017-09-251-20/+10
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Properly sized null GS bufferTim Rowley2017-09-251-1/+1
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Move SWR_GS_CONTEXT from thread local storage to stackTim Rowley2017-09-251-12/+11
| | | | | | | Move structure, as the size is significantly reduced due to dynamic allocation of the GS buffers. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Fetch compile state changesTim Rowley2017-09-252-1/+12
| | | | | | | Add ForceSequentialAccessEnable and InstanceIDOffsetEnable bools to FETCH_COMPILE_STATE. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: New GS state/context APITim Rowley2017-09-253-212/+253
| | | | | | | One piglit regression, which was a false pass: [email protected]@execution@geometry@dynamic_input_array_index Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Add support for R10G10B10_FLOAT_A2_UNORM pixel formatTim Rowley2017-09-253-17/+28
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* scons: use python3-compatible generatorEric Engestrom2017-09-251-4/+2
| | | | | | | These changes were generated using python's `2to3` tool. Suggested-by: Ilia Mirkin <[email protected]> Signed-off-by: Eric Engestrom <[email protected]>
* scons: use python3-compatible print()Eric Engestrom2017-09-251-3/+3
| | | | | | | | | These changes were generated using python's `2to3` tool. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102852 Reported-by: Alex Granni <[email protected]> Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* swr/rast: remove llvm fence/atomics from generated filesTim Rowley2017-09-221-0/+8
| | | | | | | | | | | We currently don't use these instructions, and since their API changed in llvm-5.0 having them in the autogen files broke the mesa release tarballs which ship with generated autogen files. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102847 CC: [email protected] Tested-by: Laurent Carlier <[email protected]> Reviewed-by: Bruce Cherniak <[email protected]>
* gallium: add PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVENicolai Hähnle2017-09-181-0/+1
| | | | | | | | | | | | | | | | | To be able to properly distinguish between GL_ANY_SAMPLES_PASSED and GL_ANY_SAMPLES_PASSED_CONSERVATIVE. This patch goes through all drivers, having them treat the two query types identically, except: 1. radeon incorrectly enabled conservative mode on PIPE_QUERY_OCCLUSION_PREDICATE. We now do it correctly, only on PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE. 2. st/mesa uses the new query type. Fixes dEQP-GLES31.functional.fbo.no_attachments.* Reviewed-by: Marek Olšák <[email protected]>
* gallium: introduce PIPE_CAP_LOAD_CONSTBUFTimothy Arceri2017-09-151-0/+1
| | | | Reviewed-by: Marek Olšák <[email protected]>
* swr: use ARRAY_SIZE macroEric Engestrom2017-09-141-4/+6
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Fetch compile state changesTim Rowley2017-09-133-6/+15
| | | | | | | | | | Add InstanceStrideEnable field and rename InstanceDataStepRate to InstanceAdvancementState in INPUT_ELEMENT_DESC structure. Add stubs for handling InstanceStrideEnable in FetchJit::JitLoadVertices() and FetchJit::JitGatherVertices() and assert if they are triggered. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: adjust linux cpu topology identification codeTim Rowley2017-09-131-43/+38
| | | | | | | Make more robust to handle strange strange configurations like a vmware exported 4-way numa X 1-core configuration. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Missed conversion to SIMD_TTim Rowley2017-09-131-1/+1
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: whitespace changesTim Rowley2017-09-131-0/+2
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: add graph write to jit debug putputTim Rowley2017-09-131-3/+3
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Migrate memory pointers to gfxptr_t typeTim Rowley2017-09-139-36/+36
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Remove hardcoded clip/cull slot from clipperTim Rowley2017-09-131-14/+21
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Start to remove hardcoded clipcull_dist vertex attrib slotTim Rowley2017-09-133-8/+15
| | | | | | | | Add new field in SWR_BACKEND_STATE::vertexClipCullOffset to specify the start of the clip/cull section of the vertex header. Removed use of hardcoded slot from binner. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Move clip/cull enables in APITim Rowley2017-09-139-40/+40
| | | | | | Moved from from SWR_RASTSTATE to SWR_BACKEND_STATE. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Add new API SwrStallBETim Rowley2017-09-132-0/+17
| | | | | | | | SwrStallBE stalls the backend threads until all work submitted before the stall has finished. The frontend threads can continue to make forward progress. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: FE/Clipper - unify SIMD8/16 functions using simdlib typesTim Rowley2017-09-063-1189/+446
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Remove use of C++14 template variableTim Rowley2017-09-062-6/+14
| | | | | | SWR rasterizer must remain C++11 compliant. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: SIMD16 FE remove templated immediates workaroundTim Rowley2017-09-061-90/+20
| | | | | | Fixed properly in gcc-compatible fashion. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: SIMD16 PA - rename Assemble_simd16 to AssembleTim Rowley2017-09-063-31/+15
| | | | | | For consistency and to support overloading. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: FE/Binner - unify SIMD8/16 functions using simdlib typesTim Rowley2017-09-065-1739/+696
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Removed some trailing whitespace caught during reviewTim Rowley2017-09-063-10/+10
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: set caps for VB 4-byte alignmentTim Rowley2017-09-061-3/+6
| | | | | | | | | | Needed to compensate for change to fetch jit requiring alignment. Fixes regressions in piglit: vertex-buffer-offsets and about another hundred of the vs-input*byte* tests. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Allow gather of floats from fetch shader with 2-4GB offsetsTim Rowley2017-09-062-1/+7
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: Report format max_samples=1 to maintain support for "fake" msaa.Cherniak, Bruce2017-09-011-11/+11
| | | | | | | | | | | | | | | | | | | | Accompanying patch "st/mesa: only try to create 1x msaa surfaces for 'fake' msaa" requires driver to report max_samples=1 to enable "fake" msaa. Previously, 0 and 1 were treated equivalently in st_init_extensions() and either could enable "fake" msaa. This patch raises the swr default msaa_max_count from 0 to 1, so that swr_is_format_supported will report max_samples=1. Real msaa can still be enabled by exporting SWR_MSAA_MAX_COUNT with a pow2 value between 2 and 16. This patch is necessary to prevent an OpenSWR regression resulting from the st/mesa patch. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102038 Acked-by: Brian Paul <[email protected]> Reviewed-By: George Kyriazis <[email protected]>
* swr: limit pipe_draw_info->restart_index usageTim Rowley2017-08-231-1/+4
| | | | | | | | Only copy this value when in restart drawing mode. Eliminates valgrind errors when running trivial programs. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Fix invalid casting for calls to Interlocked* functionsTim Rowley2017-08-163-7/+7
| | | | | | CID: 1416243, 1416244, 1416255 CC: [email protected] Reviewed-by: Bruce Cherniak <[email protected]>
* gallium: introduce PIPE_CAP_MEMOBJTimothy Arceri2017-08-031-0/+1
| | | | | | | | | | | | | | This can be used to guard support for EXT_memory_object and related extensions. v2: update gallium docs v3 (Timothy Arceri): - add cap to nv50 Signed-off-by: Andres Rodriguez <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* swr/rast: fix core / knights split of AVX512 intrinsicsTim Rowley2017-08-024-55/+69
| | | | | | | | Move AVX512BW specific intrinics to be Core-only. Move some AVX512F intrinsics back to common implementation file. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: simplify knob default value setupTim Rowley2017-08-022-14/+11
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: split gen_knobs templates into .h/.cppTim Rowley2017-08-025-118/+166
| | | | | | | Switch to a 1:1 mapping template:generated for future maintenance. Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: gen_knobs template code styleTim Rowley2017-08-021-2/+2
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: switch gen_knobs.cpp licenseTim Rowley2017-08-021-12/+17
| | | | | | | Unintentionally added with an apache2 license; relicense to match the rest of the tree. Reviewed-by: Bruce Cherniak <[email protected]>
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