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* swr/rast: Optimize late/bindless JIT of samplersGeorge Kyriazis2018-04-183-0/+3
| | | | | | | | | Add per-worker thread private data to all shader calls Add per-worker sampler cache and jit context Add late LoadTexel JIT support Add per-worker-thread Sampler / LoadTexel JIT Reviewed-by: Bruce Cherniak <[email protected]>
* swr: fix clang 5 null cast warningGreg V2018-01-191-3/+3
| | | | | Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Bruce Cherniak <[email protected]>
* swr: use ARRAY_SIZE macroEric Engestrom2017-09-141-4/+6
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Migrate memory pointers to gfxptr_t typeTim Rowley2017-09-132-3/+3
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Switch intrinsic usage to SIMDLibTim Rowley2017-06-301-78/+78
| | | | | | | | Switch from a macro-based simd intrinsics layer to a more C++ implementation, which also adds AVX512 optimizations to 128-bit and 256-bit SIMD. Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>
* swr/rast: Refactor includes to limit simdintrin.h usageTim Rowley2017-06-161-1/+1
| | | | | | | Reduces the files rebuilt after modifying simdintrin.h from 84 to 64. Reviewed-by: Bruce Cherniak <[email protected]>
* tree-wide: remove trailing backslashEric Engestrom2017-06-071-2/+2
| | | | | | | | | Simple search for a backslash followed by two newlines. If one of the newlines were to be removed, this would cause issues, so let's just remove these trailing backslashes. Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* swr: move msaa resolve to generalized StoreTileBruce Cherniak2017-05-081-0/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v3: list piglit tests fixed by this patch. Fixed typo Tim pointed out. v2: Reword commit message to more closely adhere to community guidelines. This patch moves msaa resolve down into core/StoreTiles where the surface format conversion routines are available. The previous "experimental" resolve was limited to 8-bit unsigned render targets. This fixes a number of piglit msaa tests by adding resolve support for all the render target formats we support. Specifically: layered-rendering/gl-layer-render: fail->pass layered-rendering/gl-layer-render-storage: fail->pass multisample-formats *[2,4,8,16] gl_arb_texture_rg: crash->pass multisample-formats *[2,4,8,16] gl_ext_texture_snorm: crash->pass multisample-formats *[2,4,8,16] gl_arb_texture_float: fail->pass multisample-formats *[2,4,8,16] gl_arb_texture_rg-float: fail->pass MSAA is still disabled by default, but can be enabled with "export SWR_MSAA_MAX_COUNT=4" (1,2,4,8,16 are options) The default is 0, which is disabled. This patch improves the number of multisample-formats supported by swr, and fixes several crashes currently in the 17.1 branch. Therefore, it should be considered for inclusion in the 17.1 stable release. Being disabled by default, it poses no risk to most users of swr. Reviewed-by: Tim Rowley <[email protected]> cc: [email protected]
* swr/rast: add memory api to SwrGetInterface()Tim Rowley2017-04-283-3/+3
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core/memory] Move intrinics to _simd functionsTim Rowley2017-04-051-14/+14
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core/memory] Fix missing avx512 storetileTim Rowley2017-04-051-11/+4
| | | | | | | Fix pre-processor macro handing to eliminate silently missing implementation for AVX512. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer] Convert more SWR_ASSERT(false, ...) to SWR_INVALID(...)Tim Rowley2017-03-205-23/+23
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core/memory] StoreTile: AVX512 progressTim Rowley2016-12-121-218/+134
| | | | | | Fixes to 128-bit formats. Reviwed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core/memory] Finish R24_UNORM_X8_TYPELESS for AVX512Tim Rowley2016-12-091-23/+23
| | | | | | This one-off specialization was missed. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer memory] assert when trying to convert an unknown formatIlia Mirkin2016-11-301-0/+1
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Tim Rowley <[email protected]>
* swr: [rasterizer memory] only clear up to the LOD sizeIlia Mirkin2016-11-281-2/+8
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Tim Rowley <[email protected]>
* swr: [rasterizer memory] hook up stencil clears for ClearTileIlia Mirkin2016-11-281-5/+8
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Tim Rowley <[email protected]>
* swr: [rasterizer memory] add support for clearing Z32F_X32 and Z16Ilia Mirkin2016-11-281-0/+2
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Tim Rowley <[email protected]>
* swr: [rasterizer core] pipe renderTargetArrayIndex through to clearsIlia Mirkin2016-11-231-7/+13
| | | | | | | | | | Currently clears only operate on the 0th array index (ignoring surface layout parameters). Instead normalize to take a RTAI like all the load/store tile logic does, and use ComputeSurfaceAddress to properly take the surface state's lod/array index into account. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Tim Rowley <[email protected]>
* swr: [rasterizer memory] minify texture width before alignmentIlia Mirkin2016-11-211-2/+2
| | | | | | | | | The minification should happen before alignment, not after. See similar logic on ComputeLODOffsetY. The current logic requires unnecessarily large textures when there's an initial NPOT size. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Tim Rowley <[email protected]>
* swr: [rasterizer memory] minify original sizes for block formatsIlia Mirkin2016-11-211-11/+25
| | | | | | | | | There's no guarantee that mip width/height will be a multiple of the compressed block size. Doing a divide by the block size first yields different results than GL expects, so we do the divide at the end. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Tim Rowley <[email protected]>
* swr: [rasterizer memory] fix store tile for 128-bit ymajor tilingIlia Mirkin2016-11-151-1/+1
| | | | | | | Noticed by inspection. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer memory] add support for R32_FLOAT_X8X24 formatsIlia Mirkin2016-11-152-0/+2
| | | | | | | | This is the format used for the primary surface of a PIPE_FORMAT_Z32_FLOAT_S8X24_UINT resource. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] 16-wide tile store nearly completedTim Rowley2016-11-141-163/+775
| | | | | | | | | | * All format combinations coded * Fully emulated on AVX2 and AVX * Known issue: the MSAA sample locations need to be adjusted for 8x2 Set ENABLE_AVX512_SIMD16 and USD_8x2_TILE_BACKEND to 1 in knobs.h to enable Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core/sim] 8x2 backend + 16-wide tile clear/load/storeTim Rowley2016-10-133-2/+432
| | | | | | | | | Work in progress (disabled). USE_8x2_TILE_BACKEND define in knobs.h enables AVX512 code paths (emulated on non-AVX512 HW). Signed-off-by: Tim Rowley <[email protected]>
* swr: [rasterizer core] update/add formatsTim Rowley2016-10-113-218/+330
| | | | Signed-off-by: Tim Rowley <[email protected]>
* swr: [rasterizer memory] split load/store for compile speedTim Rowley2016-10-1115-1834/+2276
| | | | Signed-off-by: Tim Rowley <[email protected]>
* swr: [rasterizer] add support for building avx512 versionTim Rowley2016-06-232-4/+4
| | | | | | | Currently, most code paths between AVX2 and AVX512 are identical (see changes to knobs.h). Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer] Include cmath for std::isnan and std::isinf.Vinson Lee2016-05-101-0/+2
| | | | | | | | | | | | | | | | | | | | | | | This patch fixes this build error. CXX rasterizer/memory/libswrAVX_la-ClearTile.lo In file included from rasterizer/memory/ClearTile.cpp:34:0: ./rasterizer/memory/Convert.h: In function ‘uint16_t Convert32To16Float(float)’: ./rasterizer/memory/Convert.h:170:9: error: ‘__builtin_isnan’ is not a member of ‘std’ if (std::isnan(val)) ^ ./rasterizer/memory/Convert.h:170:9: note: suggested alternative: <built-in>: note: ‘__builtin_isnan’ ./rasterizer/memory/Convert.h:176:14: error: ‘__builtin_isinf_sign’ is not a member of ‘std’ else if (std::isinf(val)) ^ ./rasterizer/memory/Convert.h:176:14: note: suggested alternative: <built-in>: note: ‘__builtin_isinf_sign’ Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95180 Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Tim Rowley <[email protected]>
* swr: [rasterizer memory] Add missing store tiles functionTim Rowley2016-05-051-1/+4
| | | | | | Storing color hot tile to 8bit w-major stencil format. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer] warning cleanupTim Rowley2016-04-271-1/+1
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* gallium: Remove every double semi-colonJakob Sinclair2016-04-261-3/+3
| | | | | | Signed-off-by: Jakob Sinclair <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* swr: [rasterizer memory] Constify load tilesTim Rowley2016-04-221-5/+7
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer] Small cleanupsTim Rowley2016-04-221-1/+0
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer] remove use of BYTE typeTim Rowley2016-03-252-6/+6
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* swr: [rasterizer] remove use of FLOAT typeTim Rowley2016-03-251-3/+3
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* swr: [rasterizer] Fix Coverity issues reported by Mesa developers.Tim Rowley2016-03-251-5/+5
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* swr: [rasterizer core] backend reorganizationTim Rowley2016-03-251-57/+1
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* gallium/swr: add OpenSWR rasterizerTim Rowley2016-03-026-0/+3942
Acked-by: Roland Scheidegger <[email protected]> Acked-by: Jose Fonseca <[email protected]>
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