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* radeonsi: move sid.h/r600d_common.h to a common place.Dave Airlie2016-09-063-9060/+3
| | | | | | | | | | Step one to merging radv would be to move some files around. This only adds the include path to r600/radeonsi, because later we want to avoid having to add it to the generic target paths. Acked-by: Marek Olšák <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: remove VPORT_ZMIN/ZMAX from init config statesMarek Olšák2016-09-051-6/+0
| | | | | | | It's part of the viewport state now. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: set VPORT_ZMIN/MAX registers correctlyMarek Olšák2016-09-053-1/+4
| | | | | | | | | | | | Calculate depth ranges from viewport states and pipe_rasterizer_state::clip_halfz. The evergreend.h change is required to silence a warning. This fixes this recently updated piglit: arb_depth_clamp/depth-clamp-range Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: also do VS_PARTIAL_FLUSH before updating VGT ring pointersMarek Olšák2016-09-051-0/+6
| | | | | | | ported from Vulkan Acked-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fix variable naming in si_emit_cache_flushMarek Olšák2016-09-051-31/+31
| | | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't emit CS_PARTIAL_FLUSH if compute is not usedMarek Olšák2016-09-053-1/+5
| | | | | | | for less noise in the HUD Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: add HUD queries for counting VS/PS/CS partial flushesMarek Olšák2016-09-051-0/+8
| | | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fix a badly implemented GS bug workaroundMarek Olšák2016-09-051-8/+13
| | | | | | | Limit it to geometry shaders and Hawaii. Acked-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fix texture format reinterpretation with DCCMarek Olšák2016-09-053-1/+14
| | | | | | | | | | | | DCC is limited in how texture formats can be reinterpreted using texture views. If we get a view format that is incompatible with the initial texture format with respect to DCC, disable DCC. There is a new piglit which tests all format combinations. What works and what doesn't was deduced by looking at the piglit failures. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fix Gather4 with integer formatsMarek Olšák2016-09-051-3/+96
| | | | | | | | | | The closed compiler does the same thing. This fixes: GL45-CTS.texture_gather.*-int-* (18 tests) Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fix a crash in imageSize for cubemap arraysMarek Olšák2016-09-051-3/+1
| | | | | | | | | | | Sometimes it was f32, other times it was i32. Now it's always i32. This fixes: GL45-CTS.texture_cube_map_array.image_texture_size.texture_size_compute_sh Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fix gl_PatchVerticesIn for tessellation evaluation shaderMarek Olšák2016-09-051-1/+6
| | | | | | | | | This fixes: GL45-CTS.tessellation_shader.tessellation_control_to_tessellation_evaluation .gl_PatchVerticesIn Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fix cubemaps viewed as 2DMarek Olšák2016-09-051-0/+4
| | | | | | | | | | | This fixes: GL43-CTS.texture_view.view_sampling v2: fix a typo, merge both if statements Cc: [email protected] Reviewed-by: Dave Airlie <[email protected]> (v1) Reviewed-by: Bas Nieuwenhuizen <[email protected]> (v1) Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: always use the same function signature for llvm.SI.exportMarek Olšák2016-09-051-4/+4
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: derive buffer placement and flags only at initializationMarek Olšák2016-09-051-3/+2
| | | | | | | | | | Invalidated buffers don't have to go through it. Split r600_init_resource into r600_init_resource_fields and r600_alloc_resource. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: set more sampler settingsMarek Olšák2016-09-052-2/+12
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* Introduce .editorconfigEric Engestrom2016-08-311-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | A few weeks ago, Jose Fonseca suggested [0] we use .editorconfig files to try and enforce the formatting of the code, to which Michel Dänzer suggested [1] we start by importing the existing .dir-locals.el settings. The first draft was discussed in the RFC [2]. These .editorconfig are a first step, one that has the advantage of requiring little to no intervention from the devs once the settings files are in place, but the settings are very limited. This does have the advantage of applying while the code is being written. This doesn't replace the need for more comprehensive formatting tools such as clang-format & clang-tidy, but those reformat the code after the fact. [0] https://lists.freedesktop.org/archives/mesa-dev/2016-June/121545.html [1] https://lists.freedesktop.org/archives/mesa-dev/2016-June/121639.html [2] https://lists.freedesktop.org/archives/mesa-dev/2016-July/123431.html Acked-by: Nicolai Hähnle <[email protected]> Acked-by: Eric Anholt <[email protected]> Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* radeonsi: add support for cull distances. (v1.1)Dave Airlie2016-08-302-4/+5
| | | | | | | | | | This should be all that is required for cull distances to work on radeonsi. v1.1: whitespace cleanup, add docs fix clipdist_mask usage. Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi: Don't use global variables for tess ldsTom Stellard2016-08-291-9/+6
| | | | | | | | | We were allocating global variables for the maximum LDS size which made the compiler think we were using all of LDS, which isn't the case. Reviewed-By: Edward O'Callaghan <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium: Use enum pipe_shader_type in set_shader_images()Kai Wasserbäch2016-08-291-1/+2
| | | | | Signed-off-by: Kai Wasserbäch <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* gallium: Use enum pipe_shader_type in set_shader_buffers()Kai Wasserbäch2016-08-291-3/+5
| | | | | Signed-off-by: Kai Wasserbäch <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* gallium: Use enum pipe_shader_type in set_sampler_views()Kai Wasserbäch2016-08-291-1/+1
| | | | | Signed-off-by: Kai Wasserbäch <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* gallium: Use enum pipe_shader_type in bind_sampler_states() (v2)Kai Wasserbäch2016-08-291-1/+2
| | | | | | | | | | | v1 → v2: - Fixed indentation (noted by Brian Paul) - Removed second assert from nouveau's switch statements (suggested by Brian Paul) Signed-off-by: Kai Wasserbäch <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* radeonsi: disable CE on SI + AMDGPUMarek Olšák2016-08-261-1/+3
| | | | | Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi: fix printing shaders and states on a VM faultMarek Olšák2016-08-261-1/+3
| | | | | | This was missed while rewriting the PIPE_DUMP flags. Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi: increase performance for DRI PRIME offloading if 2nd GPU is CIK or VIMarek Olšák2016-08-261-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | SDMA is much faster for tiled->linear blits from VRAM to GTT. I have Bonaire in my second PCIe slot. $ glxinfo | grep OpenGL.renderer OpenGL renderer string: Gallium 0.4 on AMD TONGA ... $ DRI_PRIME=1 glxinfo | grep OpenGL.renderer OpenGL renderer string: Gallium 0.4 on AMD BONAIRE ... Without SDMA: $ DRI_PRIME=1 glxgears 8796 frames in 5.0 seconds = 1759.074 FPS 8899 frames in 5.0 seconds = 1779.672 FPS With SDMA: $ DRI_PRIME=1 glxgears 12765 frames in 5.0 seconds = 2552.788 FPS 12888 frames in 5.0 seconds = 2577.495 FPS The 1st GPU is irrelevant. The improvement should be much lower at 60 fps, but definitely measurable. SI will get this once we add SDMA blit support for it. Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi: enable SDMA on CIKMarek Olšák2016-08-261-4/+0
| | | | | | It passes R600_DEBUG=testdma on Bonaire/radeon. Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* gallium/radeon: increase priority for shader binariesMarek Olšák2016-08-261-1/+1
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* gallium/radeon: merge USER_SHADER and INTERNAL_SHADER priority flagsMarek Olšák2016-08-263-9/+8
| | | | | | there's no reason to separate these Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* gallium/radeon: unify and simplify checking for an empty gfx IBMarek Olšák2016-08-251-10/+3
| | | | | | | We can take advantage of the fact that multi_fence does the obvious thing with NULL fences. This fixes unflushed fences that can get stuck due to empty IBs.
* radeonsi: disable SDMA texture copying on CarrizoMarek Olšák2016-08-251-0/+6
| | | | | Cc: 12.0 <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: fix VM faults due NULL internal const buffers on CIKMarek Olšák2016-08-241-2/+11
| | | | | | | | They are harmless, but the interrupts do decrease performance. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97039 Cc: 12.0 <[email protected]>
* gallium: add a cap to expose whether driver supports mixed color/zs bitsIlia Mirkin2016-08-231-0/+1
| | | | | | | | | | Some hardware can't render to color/depth buffers of mixed bitness. When that happens a fallback has to happen, but this allows the driver to express that this isn't an optimal scenario. The purpose of this is to remove such fbconfigs from the GLX/EGL config list. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: fix up buffer descriptor upper-bound checkingMarek Olšák2016-08-171-1/+1
| | | | | | st/mesa does this too, so we're safe. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium: change pipe_image_view::first_element/last_element -> offset/sizeMarek Olšák2016-08-171-12/+4
| | | | | | | | | This is required by OpenGL. Our hardware supports this. Example: Bind RGBA32F with offset = 4 bytes. Acked-by: Ilia Mirkin <[email protected]> Acked-by: Nicolai Hähnle <[email protected]>
* gallium: change pipe_sampler_view::first_element/last_element -> offset/sizeMarek Olšák2016-08-173-8/+11
| | | | | | | | | | | This is required by OpenGL. Our hardware supports this. Example: Bind RGBA32F with offset = 4 bytes. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97305 Acked-by: Ilia Mirkin <[email protected]> Acked-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: assign the highest priority to scratch; make rings secondMarek Olšák2016-08-171-2/+2
| | | | | | | just FYI, the kernel receives priority/4 Acked-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: mark shader rings as highest-priority buffersMarek Olšák2016-08-172-2/+2
| | | | | | | and rename the enum Acked-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: set SHADER_RW_BUFFER priority for streamout buffersMarek Olšák2016-08-171-2/+4
| | | | | Acked-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use current context for DCC feedback-loop decompress, fixes ElementalMarek Olšák2016-08-172-9/+5
| | | | | | | | | | This is just a workaround. The problem is described in the code. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96541 v2: say that it's only between the current context and aux_context Reviewed-by: Nicolai Hähnle <[email protected]> (v1)
* radeonsi: simplify CB_TARGET_MASK logicMarek Olšák2016-08-171-14/+7
| | | | | | we can now rely on CB_COLORn_INFO to disable empty slots. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't set CB_COLOR1_INFO for dual src blendingMarek Olšák2016-08-171-7/+0
| | | | | | | | | Vulkan doesn't do this. The reason may be that CB_COLOR1_INFO.SOURCE_FORMAT from NI was moved to SPI_SHADER_COL_FORMAT for SI. I asked CB guys about this 2 days ago and they still haven't replied. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: eliminate PS OUT[1] if dual src blending is off and CB1 is not boundMarek Olšák2016-08-172-11/+7
| | | | | | All VP DX9 ports benefit from this. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: add radeon_llvm_bound_index for bounds checkingNicolai Hähnle2016-08-171-18/+1
| | | | Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: use tgsi_scan_arrays for temp arraysNicolai Hähnle2016-08-171-1/+2
| | | | Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: allocate temps array info in radeon_llvm_context_initNicolai Hähnle2016-08-171-3/+3
| | | | | | | | | Also, prepare for using tgsi_array_info. This also opens the door for properly handling allocation failures, but I'm leaving that for a separate change. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: set CB_COLORn_INFO.ROUND_MODEMarek Olšák2016-08-101-0/+5
| | | | | | | just do what the register spec says Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* radeonsi: set CB_COLORn_INFO.SIMPLE_FLOATMarek Olšák2016-08-101-0/+1
| | | | | | | | This can help enable some blend optimizations (see the register spec). Vulkan always sets this. Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* radeonsi: disallow MIN/MAX blend equations for dual source blendingMarek Olšák2016-08-101-0/+10
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* radeonsi: only set dual source blending for MRT0Marek Olšák2016-08-101-0/+4
| | | | | | | | | | | | | | This is the proper fix for Overlord and Witcher 2 hangs. The hang condition is that 1 app must write to MRT0 and MRT1 from a pixel shader while MRT1 is disabled in CB_TARGET_MASK (does this generate unflushable pixel quads? I don't know), and another app (e.g. Glamor) must enable dual source blending in both MRT0 and MRT1. The hw gets confused, which leads to corruption and hangs. Cc: 12.0 11.2 <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
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