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* radeonsi: fix primitive ID in fragment shader when using tessellationNicolai Hähnle2017-05-081-10/+17
| | | | | | | | | | | In a VS->TCS->TES->PS pipeline, the primitive ID is read from TES exports, so it is as if TES were using the primitive ID. Specifically, this fixes a bug where the primitive ID is not reset at the start of a new instance. Cc: [email protected] Reviewed-by: Marek Olšák <[email protected]>
* Revert "radeonsi: constify a bunch of the perfcounter structs."Marek Olšák2017-05-061-43/+49
| | | | | | | This reverts commit 7088b655e8828bb960f528dd33132de27c505b8f. It breaks performance counters. If you use them with this commit, they hang the machine hard. Sysrq and ssh don't work.
* Revert "radeonsi: fix build with GCC 4.8"Marek Olšák2017-05-061-1/+1
| | | | | | This reverts commit 485ece83aceb3a35792efbc6fe2bca57ba46c04a. It's needed to revert 7088b655e8828bb960f528dd33132de27c505b8f.
* radeonsi: apply the tess+GS hang workaround to Polaris12 as wellMarek Olšák2017-05-051-1/+2
| | | | | | Cc: 17.1 <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fix build with GCC 4.8Samuel Pitoiset2017-05-051-1/+1
| | | | | | | Fixes: 7088b655e8 ("radeonsi: constify a bunch of the perfcounter structs.") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100937 Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/gfx9: allow the scratch buffer in HS and GSMarek Olšák2017-05-051-10/+0
| | | | | | It works now. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: prevent race conditions when doing scratch patchingMarek Olšák2017-05-051-2/+30
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: separate scratch state patching code into its own functionMarek Olšák2017-05-051-46/+55
| | | | | | | Picked from a different branch. When we stop using the scratch patching, this function will not be called. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: also apply scratch relocations to the 1st shader of merged ↵Marek Olšák2017-05-051-0/+3
| | | | | | shaders Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: set correct LLVM calling conventions for merged shadersMarek Olšák2017-05-052-2/+18
| | | | | | for scratch support Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove unused parameters from si_shader_apply_scratch_relocsMarek Olšák2017-05-054-10/+6
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: inline si_llvm_shader_type into si_llvm_create_funcMarek Olšák2017-05-053-33/+22
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't use util_memcpy_cpu_to_le32 for shader uploadsMarek Olšák2017-05-051-7/+8
| | | | | | at least I think this is correct. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: make si_compile_llvm staticMarek Olšák2017-05-052-16/+8
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fold surrounding code into si_llvm_finalize_moduleMarek Olšák2017-05-053-21/+12
| | | | | | and rename to si_llvm_optimize_module. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't call eliminate_const_vs_outputs in shaders without VS exportsMarek Olšák2017-05-051-4/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: drop support for LLVM 3.8Marek Olšák2017-05-054-78/+21
| | | | | | | | | | | | LLVM 3.8: - had broken indirect resource indexing - didn't have scratch coalescing - was the last user of problematic v16i8 - only supported OpenGL 4.1 This leaves us with LLVM 3.9 and LLVM 4.0 support for Mesa 17.2. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: stop using v16i8Marek Olšák2017-05-053-12/+8
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: make some PA & DB registers match the closed Vulkan driverMarek Olšák2017-05-051-3/+18
| | | | | Cc: 17.1 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: constify a bunch of the perfcounter structs.Dave Airlie2017-05-041-49/+43
| | | | | | | | This moves the structs from the data segment to the rodata segment, which seems like the more correct place for them. Reviewed-by: Nicolai Hähnle <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi/gfx9: fix gl_ViewportIndexMarek Olšák2017-05-032-8/+40
| | | | | | | v2: remove unnecessary LLVMBuildAnd calls Cc: 17.1 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: set VGT_REUSE_OFF = 0Marek Olšák2017-05-031-3/+7
| | | | | | same as Vulkan Reviewed-by: Nicolai Hähnle <[email protected]>
* ac: rename ac_eliminate_const_vs_outputs -> ac_optimize_vs_outputsMarek Olšák2017-05-031-5/+5
| | | | | Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't load unused compute shader input SGPRs and VGPRsMarek Olšák2017-04-284-48/+76
| | | | | | | | | Basically, don't load GRID_SIZE or BLOCK_SIZE if they are unused, determine whether to load BLOCK_ID for each component separately, and set the number of THREAD_ID VGPRs to load. Now we should get the maximum CS launch wave rate in most cases. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: add a HUD query for draw calls with primitive restartMarek Olšák2017-04-281-0/+2
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi: tell LLVM not to remove s_barrier instructionsMarek Olšák2017-04-281-12/+33
| | | | | | | LLVM 5.0 removes s_barrier instructions if the max-work-group-size attribute is not set. What a surprise. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fix tess offchip offset for per-patch attributesMarek Olšák2017-04-283-12/+18
| | | | | | We need 4 more bits there. I don't know what is fixed by this. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: pass tessellation ring addresses via user SGPRsMarek Olšák2017-04-287-56/+112
| | | | | | | | | | | | | | | | | This removes s_load_dword latency for tess rings. We need just 1 SGPR for the address if we use 64K alignment. The final asm for recreating the descriptor is: // s2 is (address >> 16) s_mov_b32 s3, 0 s_lshl_b64 s[4:5], s[2:3], 16 s_mov_b32 s6, -1 s_mov_b32 s7, 0x27fac v2: bitcast the descriptor type from v2i64 to v4i32 Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use si_insert_input_ret in si_llvm_emit_tcs_epilogueMarek Olšák2017-04-281-19/+10
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove VS epilog code, compile VS with PrimID export on demandMarek Olšák2017-04-285-210/+31
| | | | | | | | | | | | The use of PrimID in the pixel shader is too rare to deserve such a sizable support code. The initial idea of the VS epilog was to move the clipping code there and remove it based on states, but optimized variants are now used to do that and are easier to support, so the VS epilog has turned out to be not so useful. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: get InstanceID from VGPR1 (or VGPR2 for tess) instead of VGPR3Marek Olšák2017-04-284-13/+33
| | | | | | VGPR1 = InstanceID / StepRate0; // StepRate0 can be set to 1 Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't load PrimID in TES if it's not usedMarek Olšák2017-04-281-3/+3
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: explain (non-)monolithic shadersMarek Olšák2017-04-281-0/+67
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: enable OpenGL 4.5Marek Olšák2017-04-281-5/+0
| | | | | | | Tentatively enable it, expecting the scratch buffer support to be done before the next Mesa release. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: 2nd shader of merged shaders should hold a reference of the 1stMarek Olšák2017-04-282-10/+26
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: add reference counting for shader selectorsMarek Olšák2017-04-282-3/+25
| | | | | | | The 2nd shader of merged shaders should take a reference of the 1st shader. The next commit will do that. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: set VGT_VERTEX_REUSE for ES in ES-GSMarek Olšák2017-04-281-6/+12
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: set TES registers for merged ES-GSMarek Olšák2017-04-281-4/+7
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: disallow scratch buffer for LS-HS and ES-GSMarek Olšák2017-04-281-0/+10
| | | | | | not implemented yet Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: always compile monolithic ES-GS (asynchronously)Marek Olšák2017-04-282-1/+28
| | | | | | In addition to the non-monolithic variant. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: add support for monolithic ES-GSMarek Olšák2017-04-282-9/+72
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: make sure the 1st shader's main part exists for merged shadersMarek Olšák2017-04-281-18/+60
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: select shader parts for non-monolithic ES-GSMarek Olšák2017-04-281-3/+14
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: add GS prolog support for merged ES-GSMarek Olšák2017-04-281-17/+70
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: add VS prolog support for merged ES-GSMarek Olšák2017-04-281-0/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: pass GS input SGPRs and VGPRs from the ES part to GSMarek Olšák2017-04-281-0/+32
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: store ES outputs to LDSMarek Olšák2017-04-281-4/+17
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: load GS inputs from LDSMarek Olšák2017-04-281-6/+39
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: get GS wave ID from the correct inputMarek Olšák2017-04-281-3/+11
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: add the function signature of merged ES-GSMarek Olšák2017-04-282-12/+74
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
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