summaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers/radeonsi
Commit message (Collapse)AuthorAgeFilesLines
* radeonsi/compute: Upload work group, work item size in input bufferTom Stellard2013-06-031-11/+27
|
* radeonsi/compute: Pass kernel arguments in a buffer v2Tom Stellard2013-06-033-35/+44
| | | | | v2: - Fix memory leak in si_set_constant_buffer()
* radeonsi/compute: Implement un-binding of global buffersTom Stellard2013-06-031-12/+19
|
* radeonsi/compute: Support multiple kernels in a compute programTom Stellard2013-06-031-9/+18
|
* radeonsi/compute: Add missing PIPE_COMPUTE capsTom Stellard2013-06-031-0/+16
|
* gallium: Add support for multiple viewportsZack Rusin2013-05-251-6/+10
| | | | | | | | | | | | Gallium supported only a single viewport/scissor combination. This commit changes the interface to allow us to add support for multiple viewports/scissors. Signed-off-by: Zack Rusin <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: José Fonseca<[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* radeonsi: Enable GLSL 1.30Michel Dänzer2013-05-281-1/+1
|
* radeonsi: Handle TGSI TXQ opcodeMichel Dänzer2013-05-281-2/+32
|
* radeonsi: Add support for TGSI TXF opcodeMichel Dänzer2013-05-281-13/+50
|
* radeonsi: Use tgsi_util_get_texture_coord_dim()Michel Dänzer2013-05-281-25/+7
|
* radeonsi: Handle TGSI_SEMANTIC_CLIPDISTMichel Dänzer2013-05-281-4/+17
|
* radeonsi: Make border colour state handling safe for integer texturesMichel Dänzer2013-05-282-20/+27
|
* radeonsi: Fix hardware state for dual source blendingMichel Dänzer2013-05-284-6/+17
| | | | | Set up CB_SHADER_MASK register according to pixel shader exports, and enable some minimal state for colour buffer 1 in case dual source blending is used.
* radeonsi: Fix user clip planesMichel Dänzer2013-05-211-4/+3
| | | | | | 4 more little piglits. NOTE: This is a candidate for the 9.1 branch.
* radeonsi: Handle TGSI_SEMANTIC_CLIPVERTEXMichel Dänzer2013-05-216-8/+86
| | | | | | 17 more little piglits. NOTE: This is a candidate for the 9.1 branch.
* radeonsi: Initial support for multiple constant buffersMichel Dänzer2013-05-214-73/+119
| | | | | | | Just enough to support an additional internal constant buffer for the user clip planes. NOTE: This is a candidate for the 9.1 branch.
* radeonsi: Fix handling of TGSI_SEMANTIC_PSIZEMichel Dänzer2013-05-215-9/+17
| | | | | | Two more little piglits. NOTE: This is a candidate for the 9.1 branch.
* radeonsi: increase array size for shader inputs and outputsMarek Olšák2013-05-212-2/+4
| | | | | | | | | | | and add assertions to prevent buffer overflow. This fixes corruption of the si_shader struct. NOTE: This is a candidate for the 9.1 branch. [ Cherry-pick of r600g commit da33f9b919039442e9ab51f9b1d1c83a73607133 ] Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: update r600_get_llvm_processor_name for hainanAlex Deucher2013-05-141-0/+1
| | | | | Signed-off-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: add support for hainan chipsAlex Deucher2013-05-142-0/+4
| | | | | | | Note: this is a candidate for the 9.1 branch Signed-off-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* gallium: add PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE for GLMarek Olšák2013-05-111-0/+1
| | | | | | v2: fix typo 65535 -> 65536 Reviewed-by: Brian Paul <[email protected]>
* radeon/llvm: Always build libradeonllvm as staticTom Stellard2013-05-061-1/+1
| | | | | | | | | This library is very small, so there is not much to gain from building it as a shared library. Also, when linking statically with LLVM, a shared libradeonllvm exports LLVM symbols and creates problems when used with other shared objects that also link statically to LLVM. Reviewed-by: [email protected]
* gallium: fix type of flags in pipe_context::flush()Chia-I Wu2013-05-041-1/+1
| | | | | | | | | | | | | | | | It should be unsigned, not enum pipe_flush_flags. Fixed a build error: src/gallium/state_trackers/egl/android/native_android.cpp:426:29: error: invalid conversion from 'int' to 'pipe_flush_flags' [-fpermissive] v2: replace all occurrences of enum pipe_flush_flags by unsigned Signed-off-by: Chia-I Wu <[email protected]> Reviewed-by: Marek Olšák <[email protected]> [olv: document the parameter now that the type is unsigned]
* scons: remove radeon buildAndreas Boll2013-05-031-17/+0
| | | | | | | | One build system for linux/unix only drivers should be enough. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=48694 Acked-by: Jose Fonseca <[email protected]>
* vl/idct: fix for commit 7d2f2a0c890b1993532a45c8c392c28950ddc06eChristian König2013-05-031-3/+3
| | | | | | | | We still need the option for handling 3D textures as well. Should fix: https://bugs.freedesktop.org/show_bug.cgi?id=64143 Signed-off-by: Christian König <[email protected]>
* vl/buffers: fix typo in function nameChristian König2013-05-031-3/+3
| | | | Signed-off-by: Christian König <[email protected]>
* vl/buffer: use 2D_ARRAY instead of 3D texturesChristian König2013-05-011-7/+7
| | | | Signed-off-by: Christian König <[email protected]>
* radeon/uvd: stop using anonymous unionsChristian König2013-04-261-1/+1
| | | | Signed-off-by: Christian König <[email protected]>
* winsys/radeon: consolidate tracing into winsys v2Jerome Glisse2013-04-253-3/+3
| | | | | | | | | | | | This move the tracing timeout and printing into winsys and add an debug environement variable for it (R600_DEBUG=trace_cs). Lot of file touched because of winsys API changes. v2: Do not write lockup file if ib uniq id does not match last one Signed-off-by: Jerome Glisse <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: cleanup disabling tiling for UVD v3Christian König2013-04-241-3/+4
| | | | | | | | | | Should fix: https://bugs.freedesktop.org/show_bug.cgi?id=63702 v2: add a comment that this is just a workaround v3: fix typo in comment Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* gallium: Replace gl_rasterization_rules with lower_left_origin and ↵José Fonseca2013-04-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | half_pixel_center. Squashed commit of the following: commit 04c5fa2cbb8e89d6f2fa5a75af1cca03b1f6b852 Author: José Fonseca <[email protected]> Date: Tue Apr 23 17:37:18 2013 +0100 gallium: s/lower_left_origin/bottom_edge_rule/ commit 4dff4f64fa83b9737def136fffd161d55e4f1722 Author: José Fonseca <[email protected]> Date: Tue Apr 23 17:35:04 2013 +0100 gallium: Move diagram to docs. commit 442a63012c8c3c3797f45e03f2ca20ad5f399832 Author: James Benton <[email protected]> Date: Fri May 11 17:50:55 2012 +0100 gallium: Replace gl_rasterization_rules with lower_left_origin and half_pixel_center. This change is necessary to achieve correct results when using OpenGL FBOs. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: add support for compressed texture v2Jerome Glisse2013-04-182-2/+76
| | | | | | | | | | Most test pass, issue are with border color and swizzle. Based on ircnick<maelcum> patch. v2: Restaged commit hunk Signed-off-by: Jerome Glisse <[email protected]>
* radeonsi: add 2d tiling support for texture v3Jerome Glisse2013-04-182-72/+20
| | | | | | | | v2: Remove left over code v3: Restage properly the commit so hunk of first one are not in second one. Signed-off-by: Jerome Glisse <[email protected]>
* st/mesa: optionally apply texture swizzle to border color v2Christoph Bumiller2013-04-181-0/+1
| | | | | | | | | | | | This is the only sane solution for nv50 and nvc0 (really, trust me), but since on other hardware the border colour is tightly coupled with texture state they'd have to undo the swizzle, so I've added a cap. The dependency of update_sampler on the texture updates was introduced to avoid doing the apply_depthmode to the swizzle twice. v2: Moved swizzling helper to u_format.c, extended the CAP to provide more accurate information.
* radeonsi: Read config values from the .AMDGPU.config ELF sectionTom Stellard2013-04-151-7/+27
| | | | | | | | | Instead of emitting configuration values (e.g. number of gprs used) in a predefined order, the LLVM backend now emits these values in register/value pairs. The first dword contains the register address and the second dword contians the value to write. Reviewed-by: Michel Dänzer <[email protected]>
* radeon/llvm: Use a struct for storing compiled codeTom Stellard2013-04-151-18/+17
|
* radeon/uvd: add UVD implementation v5Christian König2013-04-115-6/+193
| | | | | | | | | | | | | | Just everything you need for UVD with r600g and radeonsi. v2: move UVD code to radeon subdir, clean up build system additions, remove an unused SI function, disable tiling on SI for now. v3: some minor indentation fix and rebased v4: dpb size calculation fixed v5: implement proper fall-back in case the kernel doesn't support UVD, based on patches from Andreas Boll but cleaned up a bit more. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: remove sampler writemask v3Christian König2013-04-101-12/+7
| | | | | | | | v2: fix instrinsic name as well v3: LLVM revision incremented as well Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: Add compute support v3Tom Stellard2013-04-059-48/+375
| | | | | | | | | | | v2: - Only dump shaders when env variable is set. v3: - Don't emit VGT registers Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]
* radeonsi: Set TCL1_ACTION_ENA when invalidating the texture cacheTom Stellard2013-04-051-0/+1
| | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]
* radeonsi: Remove si_pm4_inval_vertex_cache()Tom Stellard2013-04-053-8/+1
| | | | | | | | This function is a holdover from r600g and is identical to si_pm4_inval_texture_cache(), so it is not needed. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]
* gallium: PIPE_COMPUTE_CAP_IR_TARGET - allow drivers to specify a processor v2Tom Stellard2013-04-053-1/+15
| | | | | | | | | | | | This target string now contains four values instead of three. The old processor field (which was really being interpreted as arch) has been split into two fields: processor and arch. This allows drivers to pass a more a more detailed description of the hardware to compiler frontends. v2: - Adapt to libclc changes Reviewed-by: Francisco Jerez <[email protected]>
* radeonsi: add more cases for copying unsupported formats to resource_copy_regionMarek Olšák2013-04-031-0/+12
| | | | | | | | | | | Ported from r600g commit: 8891b2f9c91b2f6c8625184c23a10b8e55875dc0 Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]> NOTE: This is a candidate for the 9.1 branch.
* gallium: add PIPE_CAP_QUERY_PIPELINE_STATISTICSChristoph Bumiller2013-04-031-0/+1
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: add instance divisor support v3Christian König2013-04-024-59/+94
| | | | | | | | v2: reduce key size, don't copy key around to much. v3: remove key size reduction Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: add start instance supportChristian König2013-04-023-10/+21
| | | | | | | | This works different than on R600, we need to add the start instance manually. Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Tested-by: Michel Dänzer <[email protected]>
* radeonsi: add instanceid supportChristian König2013-04-024-7/+43
| | | | | | Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Tested-by: Michel Dänzer <[email protected]>
* radeonsi: Handle arbitrary 2-byte formats in resource_copy_regionMichel Dänzer2013-04-021-0/+6
| | | | | | | | | | | Fixes mplayer -vo vdpau OSD. NOTE: This is a candidate for the 9.1 branch. Reported-by: Igor Vagulin <[email protected]> Reviewed-by: Christian König <[email protected]> Tested-by: Christian König <[email protected]>
* radeonsi: add cs tracing v3Jerome Glisse2013-03-276-1/+124
| | | | | | | | | | | Same as on r600, trace cs execution by writting cs offset after each states, this allow to pin point lockup inside command stream and narrow down the scope of lockup investigation. v2: Use WRITE_DATA packet instead of WRITE_MEM v3: Remove useless nop packet Signed-off-by: Jerome Glisse <[email protected]>
* radeonsi: add preloading for all samplersChristian König2013-03-261-12/+45
| | | | | Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>