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* radeonsi: add nir shader cache supportTimothy Arceri2018-02-201-11/+30
| | | | | | | In future we might want to try avoid calling nir_serialize() but this works for now. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: rename variables tgsi_binary -> ir_binaryTimothy Arceri2018-02-201-21/+21
| | | | | | This better represents that the ir could be either tgsi or nir. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: fix regression from 32-bit pointers on CIMarek Olšák2018-02-191-1/+1
| | | | Tested-by: Michel Dänzer <[email protected]>
* radeonsi/nir: fix gl_FragCoord for pixel_center_integerTimothy Arceri2018-02-191-0/+5
| | | | | | Fixes piglit test glsl-arb-fragment-coord-conventions Reviewed-by: Kenneth Graunke <[email protected]>
* radeonsi: implement 32-bit pointers in user data SGPRs (v2)Marek Olšák2018-02-175-59/+123
| | | | | | | | | | | | | | | | | | | | | | | | | | User SGPRs changes: VS: 14 -> 9 TCS: 14 -> 10 TES: 10 -> 6 GS: 8 -> 4 GSCOPY: 2 -> 1 PS: 9 -> 5 Merged VS-TCS: 24 -> 16 Merged VS-GS: 18 -> 11 Merged TES-GS: 18 -> 11 SGPRS: 2170102 -> 2158430 (-0.54 %) VGPRS: 1645656 -> 1641516 (-0.25 %) Spilled SGPRs: 9078 -> 8810 (-2.95 %) Spilled VGPRs: 130 -> 114 (-12.31 %) Scratch size: 1508 -> 1492 (-1.06 %) dwords per thread Code Size: 52094872 -> 52692540 (1.15 %) bytes Max Waves: 371848 -> 372723 (0.24 %) v2: - the shader cache needs to take address32_hi into account - set amdgpu-32bit-address-high-bits Reviewed-by: Samuel Pitoiset <[email protected]> (v1)
* radeonsi: disallow constant buffers with a 64-bit address in slot 0Marek Olšák2018-02-172-1/+9
| | | | | | | State trackers must use a user buffer or const_uploader, or set pipe_resource::flags same as const_uploader->flags. Reviewed-by: Samuel Pitoiset <[email protected]>
* gallium: use PIPE_CAP_CONSTBUF0_FLAGSMarek Olšák2018-02-171-1/+1
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* gallium: allow drivers to impose BO flags restrictions on constant buffer 0Marek Olšák2018-02-171-0/+1
| | | | Required by radeonsi for optimal behavior.
* radeonsi/nir: set TGSI_PROPERTY_FS_EARLY_DEPTH_STENCIL correctlyTimothy Arceri2018-02-161-1/+2
| | | | | | We set this for post_depth_coverage in addition to early_fragment_tests. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: fix si_nir_load_tcs_varyings() for outputsTimothy Arceri2018-02-151-2/+11
| | | | | | We were incorrectly using the input info for outputs. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: fix shader ballot return value bitsizeTimothy Arceri2018-02-151-1/+1
| | | | | | | Fixes cts test: KHR-GL46.shader_ballot_tests.ShaderBallotFunctionBallot Reviewed-by: Marek Olšák <[email protected]>
* ac: remove nir_to_llvm_context from ac_nir_translate()Samuel Pitoiset2018-02-141-1/+1
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* gallium: drop all the guard band float caps.Dave Airlie2018-02-141-5/+0
| | | | | | | | | | Nobody queries these and nobody sets them to anything useful, the docs say TODO. Drop them until a use appears. Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi: make si_declare_compute_memory() more generic and call for nirTimothy Arceri2018-02-134-7/+18
| | | | Reviewed-by: Marek Olšák <[email protected]>
* ac: remove unused parameters in abi::load_tess_coord()Samuel Pitoiset2018-02-121-4/+2
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add load_sample_mask_in() to the ABISamuel Pitoiset2018-02-121-0/+6
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* st/radeonsi: enable disk cache for nirTimothy Arceri2018-02-101-4/+0
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: stop returning PIPE_SHADER_IR_NATIVE for PIPE_SHADER_CAP_PREFERRED_IRTimothy Arceri2018-02-101-3/+0
| | | | | | | | | Clover now checks PIPE_SHADER_CAP_SUPPORTED_IRS for native support instead. This change indirectly enables NIR support for compute shaders on radeonsi. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: add depth layout to scan passTimothy Arceri2018-02-101-0/+19
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi/nir: add FRAG_RESULT_COLOR to scan passTimothy Arceri2018-02-101-0/+6
| | | | | | Fixes a number of draw buffers piglit tests. Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi/nir: gather some missing fs infoTimothy Arceri2018-02-091-0/+5
| | | | | | Fixes some early-z arb_shader_image_load_store piglit tests. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: copy the NIR enablement debug bit to the shader cache flagsMarek Olšák2018-02-091-1/+2
| | | | | | | When NIR is enabled, TGSI must not be used. When NIR is disabled, TGSI Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* ac: add ac_build_export_null() helperSamuel Pitoiset2018-02-081-20/+1
| | | | | | | Imported from RadeonSI. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: avoid int-to-pointer-cast warnings on 32bitGrazvydas Ignotas2018-02-081-6/+12
| | | | | | | I hope the actual dropping of MSB is ok, but that's what's already happened before this change. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: add nir support for compiling compute shadersTimothy Arceri2018-02-073-18/+39
| | | | Reviewed-by: Marek Olšák <[email protected]>
* ac/radeonsi: add num_work_groups to the abiTimothy Arceri2018-02-072-3/+2
| | | | Reviewed-by: Marek Olšák <[email protected]>
* ac/radeonsi: create ac_build_shader_clock() helperTimothy Arceri2018-02-071-5/+1
| | | | Reviewed-by: Marek Olšák <[email protected]>
* ac/radeonsi: add load_local_group_size() to the abiTimothy Arceri2018-02-071-0/+1
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: add get_block_size() helperTimothy Arceri2018-02-071-20/+27
| | | | | | This will be reused by the nir backend in a later patch. Reviewed-by: Marek Olšák <[email protected]>
* ac/radeonsi: add local_invocation_ids to the abiTimothy Arceri2018-02-072-3/+2
| | | | Reviewed-by: Marek Olšák <[email protected]>
* ac/radeonsi: add workgroup_ids to the abiTimothy Arceri2018-02-072-6/+4
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: gather some compute info in si_nir_scan_shader()Timothy Arceri2018-02-071-6/+27
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: always set input_usage_mask as using all componentsTimothy Arceri2018-02-071-4/+10
| | | | | | | | | | | This fixes a regression for now, in the future we should gather the used components properly. V2: just set for VS and correctly handle doubles Fixes: be973ed21f6e "radeonsi: load the right number of components for VS inputs and TBOs" Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: enable vcn encode for HEVC mainBoyuan Zhang2018-02-051-1/+3
| | | | | | | Enable vcn encode for HEVC main profile on Raven. Signed-off-by: Boyuan Zhang <[email protected]> Acked-by: Christian König <[email protected]>
* amd: remove support for LLVM 3.9Marek Olšák2018-02-024-16/+5
| | | | | | | | | | | Only these are supported: - LLVM 4.0 - LLVM 5.0 - LLVM 6.0 - master (7.0) Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi: use pknorm_i16/u16 and pk_i16/u16 LLVM intrinsicsMarek Olšák2018-02-021-113/+39
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi: use ac_build_buffer_load_format for image buffer loadsMarek Olšák2018-02-011-4/+10
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* ac: add glc parameter to ac_build_buffer_load_formatMarek Olšák2018-02-012-2/+2
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi: load the right number of components for VS inputs and TBOsMarek Olšák2018-02-012-5/+16
| | | | | | | | | | | | | | | | | | | | | | | The supported counts are 1, 2, 4. (3=4) The following snippet loads float, vec2, vec3, and vec4: Before: buffer_load_format_x v9, v4, s[0:3], 0 idxen ; E0002000 80000904 buffer_load_format_xyzw v[0:3], v5, s[8:11], 0 idxen ; E00C2000 80020005 s_waitcnt vmcnt(0) ; BF8C0F70 buffer_load_format_xyzw v[2:5], v6, s[12:15], 0 idxen ; E00C2000 80030206 s_waitcnt vmcnt(0) ; BF8C0F70 buffer_load_format_xyzw v[5:8], v7, s[4:7], 0 idxen ; E00C2000 80010507 After: buffer_load_format_x v10, v4, s[0:3], 0 idxen ; E0002000 80000A04 buffer_load_format_xy v[8:9], v5, s[8:11], 0 idxen ; E0042000 80020805 buffer_load_format_xyzw v[0:3], v6, s[12:15], 0 idxen ; E00C2000 80030006 s_waitcnt vmcnt(0) ; BF8C0F70 buffer_load_format_xyzw v[3:6], v7, s[4:7], 0 idxen ; E00C2000 80010307 Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi: remove unused si_shader_context membersMarek Olšák2018-02-012-11/+0
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi: remove DBG_PRECOMPILEMarek Olšák2018-01-312-50/+0
| | | | | | it's useless and shader-db stats only report the main shader part. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: print shader-db stats for main parts, not final binariesMarek Olšák2018-01-313-13/+23
| | | | | | This is needed to get shader-db stats for LS,HS,ES,GS stages on gfx9. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: move max_simd_waves computation into a separate functionMarek Olšák2018-01-312-12/+23
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/nir: add input support for arrays that have not been copied to ↵Timothy Arceri2018-01-311-67/+79
| | | | | | | | | temps and split We need this to be able to support the interpolateAt builtins in a sane way. It also leads to the generation of more optimal code. Reviewed-by: Marek Olšák <[email protected]>
* ac/radeonsi: add lookup_interp_param and load_sample_position to the abiTimothy Arceri2018-01-311-0/+2
| | | | | | | This will enable the interpolateAt builtins to work on the radeonsi nir backend. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: add prim_mask to the abiTimothy Arceri2018-01-311-3/+4
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: adjust load_sample_position() to be shared between backendsTimothy Arceri2018-01-311-2/+3
| | | | | | | With this interface change it can be shared between the tgsi and nir backends. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: add si_nir_lookup_interp_param() helperTimothy Arceri2018-01-312-0/+40
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: move the interpolation qualifier scanningTimothy Arceri2018-01-311-16/+36
| | | | | | | | We need to collect this when scanning over the instruction rather than when scanning over the inputs otherwise we might get confliting values for inputs that are use by the interpolateAt* builtins. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: add interpolate at intrinsics to scan_instruction()Timothy Arceri2018-01-311-0/+30
| | | | | | V2: use the uses_*_opcode_interp_* flags Reviewed-by: Marek Olšák <[email protected]>
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