summaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers/radeonsi
Commit message (Collapse)AuthorAgeFilesLines
* radeonsi: don't emit PKT3_CONTEXT_CONTROL on amdgpuMarek Olšák2019-08-191-4/+7
| | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi: fix an assertion failure: assert(!res->b.is_shared)Marek Olšák2019-08-191-2/+1
| | | | | | | | | | | This only appears to happen on Raven2. Possible way to reproduce: resource_get_handle(WINSYS_HANDLE_TYPE_KMS) --> sets is_shared = true resource_get_handle(WINSYS_HANDLE_TYPE_DMABUF) --> fail Cc: 19.1 19.2 <[email protected]>
* radeonsi: handle the use_ngg_streamout flag in si_update_nggMarek Olšák2019-08-191-5/+18
|
* radeonsi: move the tess factor ring size assertion to a place where it mattersMarek Olšák2019-08-192-1/+1
| | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi: add support for RenoirMarek Olšák2019-08-142-1/+4
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi: remove the always_nir optionMarek Olšák2019-08-124-6/+2
| | | | tgsi_to_nir is no longer optional if NIR is enabled.
* radeonsi/nir: implement default tess level system valuesMarek Olšák2019-08-121-15/+35
| | | | Reviewed-by: Connor Abbott <[email protected]>
* gallium: add TGSI_SEMANTIC_DEFAULT_OUTER/INNER_LEVELMarek Olšák2019-08-123-12/+5
| | | | for radeonsi NIR support.
* compiler: add SYSTEM_VALUE_USER_DATA_AMDMarek Olšák2019-08-121-0/+6
| | | | for internal radeonsi shaders
* compiler: add shader_info.cs.user_data_components_amdMarek Olšák2019-08-121-0/+1
|
* compiler: add shader_info.vs.blit_sgprs_amdMarek Olšák2019-08-121-0/+2
| | | | for internal radeonsi shaders
* gallium: add AMD-specific compute TGSI enumsMarek Olšák2019-08-124-11/+5
| | | | for tgsi_to_nir
* gallium: add TGSI_PROPERTY_VS_BLIT_SGPRS_AMD for tgsi_to_nirMarek Olšák2019-08-125-15/+12
| | | | needed by radeonsi NIR support
* gallium: redefine ATOMINC_WRAP to be more hardware-friendlyIlia Mirkin2019-08-071-12/+0
| | | | | | | | Both AMD and NVIDIA hardware define it this way. Instead of replicating the logic everywhere, just fix it up in one place. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: limit DPBB context_states_per_bin batches when using gfx9 workaroundPierre-Eric Pelloux-Prayer2019-08-071-1/+5
| | | | | | | | It seems that using 'context_states_per_bin = 1' for DPBB fixes the reported issue. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110214 Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: reduce DPBB persistent_states_per_bin value for APUsPierre-Eric Pelloux-Prayer2019-08-071-1/+2
| | | | | | | | Fixes some reported GPU hangs on RAVEN. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111231 Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: fix typo in DPBB register fieldPierre-Eric Pelloux-Prayer2019-08-071-1/+4
| | | | | | | Also only set FLUSH_ON_BINNING_TRANSITION for GPU families that needs it (matches what si_emit_dpbb_disable is doing). Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: fix S_028C48_MAX_ALLOC_COUNT valuePierre-Eric Pelloux-Prayer2019-08-071-1/+1
| | | | | | This field uses "value minus 1" encoding. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: enable EXT_shader_image_load_storePierre-Eric Pelloux-Prayer2019-08-061-0/+2
| | | | | | This depends on LLVM 10 because this needs https://reviews.llvm.org/D65283 Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: add support for nir atomic_inc_wrap/atomic_dec_wrapPierre-Eric Pelloux-Prayer2019-08-061-0/+2
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: add support for tgsi ATOMDEC_WRAP / ATOMINC_WRAP opcodesPierre-Eric Pelloux-Prayer2019-08-061-0/+23
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/gfx10: enable all CUs for GS if NGG is never usedMarek Olšák2019-08-061-2/+4
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi/gfx10: add global use_ngg and use_ngg_streamout flagsMarek Olšák2019-08-069-32/+41
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi/gfx10: remove an obsolete VGT_REUSE_OFF workaroundMarek Olšák2019-08-062-9/+0
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi/gfx10: disable LATE_ALLOC_GS on Navi14Marek Olšák2019-08-061-1/+8
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi/gfx10: implement a bug workaround for GE_PC_ALLOCMarek Olšák2019-08-062-11/+12
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi/gfx10: implement a bug workaround for NGG -> legacy transitionsMarek Olšák2019-08-062-2/+16
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi/gfx10: implement a GE bug workaroundMarek Olšák2019-08-061-0/+18
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi/gfx10: set GE_CNTL for tessellation correctlyMarek Olšák2019-08-061-5/+11
| | | | | | | to match PAL Reviewed-by: Samuel Pitoiset <[email protected]> Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi/gfx10: simplify NGG code in si_update_shadersMarek Olšák2019-08-061-9/+3
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi/gfx10: fix input VGPRs for legacy VSMarek Olšák2019-08-062-8/+11
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi: make sure that rasterizer state != NULL and remove all NULL checkingMarek Olšák2019-08-065-17/+15
| | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi: make sure that DSA state != NULL and remove all NULL checkingMarek Olšák2019-08-065-12/+11
| | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi: make sure that blend state != NULL and remove all NULL checkingMarek Olšák2019-08-065-55/+43
| | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi: DCC MSAA blending bug - include logic op, limit to Navi14 and olderMarek Olšák2019-08-062-2/+9
| | | | Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi: determine accurately whether logic op is enabledMarek Olšák2019-08-061-3/+5
| | | | Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi: skip draw calls with 0-sized index buffersMarek Olšák2019-08-061-0/+6
| | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi/nir: lower PS inputs before scanning the shaderMarek Olšák2019-08-063-95/+86
| | | | | | | Lowering PS inputs can eliminate some of them, which messes up persp/linear barycentric coord usage info. Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi/nir: handle key.mono.u.ps.interpolate_at_sample_force_centerMarek Olšák2019-08-061-1/+4
| | | | Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi: add missing prints into si_dump_shader_keyMarek Olšák2019-08-061-0/+9
| | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi: disable SDMA image copies on dGPUs to fix corruption in gamesMarek Olšák2019-08-061-1/+9
| | | | | Cc: 19.1 19.2 <[email protected]> Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* ac/nir,radv: Optimize bounds check for 64 bit CAS.Bas Nieuwenhuizen2019-08-021-0/+1
| | | | | | | | When the application does not ask for robust buffer access. Only implemented the check in radv. Reviewed-by: Samuel Pitoiset <[email protected]>
* gallium: Implement GL_EXT_shader_samples_identical via a new capabilityKenneth Graunke2019-08-011-0/+1
| | | | | | | | | This exposes the textureSamplesIdenticalEXT function in GLSL. We enable it for iris and radeonsi, because their compilers already have support for this. Tested on Intel Kabylake and AMD Vega 64. Reviewed-by: Marek Olšák <[email protected]>
* tree-wide: replace MAYBE_UNUSED with ASSERTEDEric Engestrom2019-07-315-7/+7
| | | | | | Suggested-by: Jason Ekstrand <[email protected]> Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* radeonsi: release NIR in the right place to fix crashesMarek Olšák2019-07-301-1/+1
|
* radeonsi: fix packing of key.mono.u.psMarek Olšák2019-07-301-3/+3
|
* radeonsi: don't use lp_build_if for the prim discard compute shaderMarek Olšák2019-07-301-23/+18
|
* radeonsi: don't use lp_build_if for the wrapping if block in the VS prologMarek Olšák2019-07-301-7/+8
|
* radeonsi: don't use lp_build_if for the wrapping if block in merged shadersMarek Olšák2019-07-303-7/+11
|
* radeonsi: don't use lp_build_if (in most common places)Marek Olšák2019-07-302-29/+22
|
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-22 15:34:41 +0000