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* radeonsi: Flush when we're asked to return a fence but don't have one yetMichel Dänzer2015-07-221-1/+2
| | | | Reviewed-by: Marek Olšák <[email protected]>
* gallium: replace INLINE with inlineIlia Mirkin2015-07-212-3/+3
| | | | | | | | | | | | | | | | Generated by running: git grep -l INLINE src/gallium/ | xargs sed -i 's/\bINLINE\b/inline/g' git grep -l INLINE src/mesa/state_tracker/ | xargs sed -i 's/\bINLINE\b/inline/g' git checkout src/gallium/state_trackers/clover/Doxyfile and manual edits to src/gallium/include/pipe/p_compiler.h src/gallium/README.portability to remove mentions of the inline define. Signed-off-by: Ilia Mirkin <[email protected]> Acked-by: Marek Olšák <[email protected]>
* gallium: add PIPE_CAP_MAX_SHADER_PATCH_VARYINGSMarek Olšák2015-07-161-0/+1
| | | | Reviewed-by: Ilia Mirkin <[email protected]>
* radeonsi: directly include radeon/* headersEmil Velikov2015-07-131-1/+1
| | | | Signed-off-by: Emil Velikov <[email protected]>
* radeonsi: ARB_gpu_shader_fp64 + ARB_vertex_attrib_64bit support.Dave Airlie2015-07-122-4/+28
| | | | | | | | | | | | This adds the translation from TGSI to AMDGPU llvm backend, for the 64-bit opcodes. The backend pretty much handles everything for us fine. There is one patch required for SI DFRAC support, that I know off. [airlied: fixed missing comma, updated relnotes] Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi: Use param export count from si_llvm_export_vs in si_shader_vsMichel Dänzer2015-07-073-22/+6
| | | | | | | | | | | | This eliminates the error prone logic in si_shader_vs recalculating this value. It also fixes TGSI_SEMANTIC_CLIPDIST outputs incorrectly not being counted for VS exports. They need to be counted because they are passed to the pixel shader as parameters as well. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91193 Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: don't flush an empty IB if the only thing we need is a fenceMarek Olšák2015-07-053-3/+15
| | | | Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: fix a hang with DrawTransformFeedback on 4 SE chipsMarek Olšák2015-07-051-0/+4
| | | | | | Cc: 10.6 10.5 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r600g,radeonsi: implement get_device_reset_statusMarek Olšák2015-07-031-1/+3
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* radeonsi: add support for geometry shader invocations.Dave Airlie2015-06-274-1/+13
| | | | | Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi: add support for viewport array (v3)Dave Airlie2015-06-276-40/+69
| | | | | | | | | | | | | | | | | This isn't pretty and I'd suggest it the pm4 interface builder could be tweaked to do this more efficently, but I'd need guidance on how that would look. This seems to pass the few piglit tests I threw at it. v2: handle passing layer/viewport index to fragment shader. fix crash in blit changes, add support to io_get_unique_index for layer/viewport index update docs. v3: avoid looking up viewport index and layer in es (Marek). Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi: don't fail in si_shader_io_get_unique_indexMarek Olšák2015-06-251-2/+6
| | | | Trivial. Picked from my tessellation branch.
* radeonsi: Add CIK SDMA supportMichel Dänzer2015-06-087-21/+427
| | | | | | | | | Based on the corresponding SI support. Same as that, this is currently only enabled for one-dimensional buffer copies due to issues with multi-dimensional SDMA copies. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* tgsi/ureg: don't emit in/out arrays if drivers don't support ranged declarationsMarek Olšák2015-06-051-0/+1
| | | | | | Softpipe, llvmpipe, r300g, and radeonsi pass tests. Other drivers need testing. Freedreno and nv30 are definitely broken. Other drivers seem to be alright.
* radeonsi: use a switch statement in si_delete_shader_selectorMarek Olšák2015-05-261-6/+13
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: use a switch statement in si_shader_selector_keyMarek Olšák2015-05-261-9/+16
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: fix scratch buffer setup for geometry shadersMarek Olšák2015-05-261-2/+9
| | | | | Cc: 10.6 <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: remove unused cases from si_shader_io_get_unique_indexMarek Olšák2015-05-261-14/+3
| | | | | | | These can't occur between VS and GS, because GS is only supported in the core profile. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: don't count special outputs for the VS export countMarek Olšák2015-05-261-0/+5
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: add support for PIPE_CAP_TGSI_TEXCOORDMarek Olšák2015-05-264-15/+13
| | | | | | | | | | | | | Without it, texcoords are mapped to GENERIC[0..7], PointCoord is mapped to GENERIC[8], and user-defined varyings start from GENERIC[9]. Since texcoords can only be used between VS and PS, and PointCoord is PS-only, it's silly to always start from GENERIC[9] in all other shaders (such as LS, HS, ES, GS). This adds support for TEXCOORD and PCOORD semantics. As a result, st/mesa will use GENERIC[0] as a base for user-defined varyings, which should make linking ES and GS as well as tessellation shaders at runtime easier. Reviewed-by: Michel Dänzer <[email protected]>
* gallium: add PIPE_CAP_DEVICE_RESET_STATUS_QUERYMarek Olšák2015-05-121-0/+1
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* winsys/radeon: add a private interface for radeon_surfaceMarek Olšák2015-04-292-4/+4
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* winsys/radeon: move radeon_winsys.h to drivers/radeonMarek Olšák2015-04-291-1/+1
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* radeonsi: set an optimal value for DB_Z_INFO.ZRANGE_PRECISIONMarek Olšák2015-04-271-7/+2
| | | | | | Required because of a VI hw bug. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: remove deprecated and useless registersMarek Olšák2015-04-271-10/+0
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: remove useless includesMarek Olšák2015-04-271-3/+0
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* android: use LOCAL_SHARED_LIBRARIES over TARGET_OUT_HEADERSEmil Velikov2015-04-221-2/+1
| | | | | | | | | ... to manage the LIBDRM*_CFLAGS. The former is the recommended approach by the Android build system developers while the latter has been depreciated for quite some time. Cc: "10.4 10.5" <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* radeonsi: add a debug option to compile shaders when they're createdMarek Olšák2015-04-161-0/+4
| | | | Tested-by: Tom Stellard <[email protected]>
* radeonsi: remove bogus r600-- tripleEmil Velikov2015-04-161-2/+0
| | | | | | | | | | As mentioned by Michel Dänzer for LLVM >= 3.6 we create the LLVMTargetMachine (with triple amdgcn--), as we setup the radeonsi context. For older LLVM or hardware (r600) the triple is always r600-- and is created at a later stage - radeon_llvm_compile() Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: Add header and footer to shader stat dumpTom Stellard2015-04-141-2/+4
| | | | | | This makes it easier to parse. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/compute: Default to the same PIPE_SHADER_CAP values as other shader ↵Tom Stellard2015-03-311-1/+5
| | | | | | | | | types v2 v2: - Fix typo Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Cache LLVMTargetMachineRef in context instead of in screenMichel Dänzer2015-03-306-30/+41
| | | | | | | | | | Fixes a crash in genymotion with several threads compiling shaders concurrently. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89746 Cc: 10.5 <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: increase coords array size for radeon_llvm_emit_prepare_cube_coordsMarek Olšák2015-03-181-1/+1
| | | | | | | | | radeon_llvm_emit_prepare_cube_coords uses coords[4] in some cases (TXB2 etc.) Discovered by Coverity. Reported by Ilia Mirkin. Cc: 10.5 10.4 <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: add a helper for extracting bitfields from parameters (v2)Marek Olšák2015-03-161-16/+27
| | | | | | | | This will be used a lot (especially by tessellation). v2: don't use the bfe intrinsic Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: move scratch reloc state setupMarek Olšák2015-03-162-15/+22
| | | | | | | | - move it to its own function - do it after all states are emitted - bump SI_MAX_DRAW_CS_DWORDS Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: don't emit PA_SC_LINE_STIPPLE if not rendering linesMarek Olšák2015-03-161-0/+8
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: don't emit PA_SC_LINE_STIPPLE after every rasterizer state changeMarek Olšák2015-03-164-7/+7
| | | | | | Do it only when the line stipple state is changed. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: move PA_SU_SC_MODE_CNTL to rasterizer stateMarek Olšák2015-03-165-30/+14
| | | | | | | | | This requires enabling the optional GL provoking vertex behavior for quads. + some cosmetic changes, so that the register is set exactly the same as on r600. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: implement line and polygon smoothingMarek Olšák2015-03-164-10/+49
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: add shader code for smoothingMarek Olšák2015-03-163-1/+39
| | | | | | | The fragment shader multiplies the alpha channel with gl_SampleMaskIn. If blending is enabled, it looks like MSAA. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: split sample locations into its own state atomMarek Olšák2015-03-165-0/+18
| | | | | | Sample locations are not updated as often as framebuffers. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: add basic code for overrasterizationMarek Olšák2015-03-161-1/+1
| | | | | | | This will be used for line and polygon smoothing. This is GCN-only even though it's in shared code. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: small cleanup in si_shader_selector_keyMarek Olšák2015-03-161-12/+12
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: simplify accessing alpha pointer in si_llvm_emit_fs_epilogueMarek Olšák2015-03-161-7/+8
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: implement gl_SampleMaskInMarek Olšák2015-03-161-0/+4
| | | | Reviewed-by: Glenn Kennard <[email protected]>
* radeonsi: add support for SQRTMarek Olšák2015-03-161-1/+1
| | | | | Reviewed-by: Tom Stellard <[email protected]> Reviewed-by: Glenn Kennard <[email protected]>
* radeonsi: add support for FMAMarek Olšák2015-03-161-1/+2
| | | | | Reviewed-by: Tom Stellard <[email protected]> Reviewed-by: Glenn Kennard <[email protected]>
* gallium: add FMA and DFMA opcodes (v3)Marek Olšák2015-03-161-0/+1
| | | | | | | | | Needed by ARB_gpu_shader5. v2: select DMAD for FMA with double precision v3: add and select DFMA Reviewed-by: Ilia Mirkin <[email protected]>
* radeonsi: Add additional information to shader dumpsTom Stellard2015-03-091-6/+12
| | | | | | | This adds SGPR count, VGPR count, shader size, LDS size, and scratch usage to shader dumps. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/compute: Use value from compiler for COMPUTE_PGM_RSRC1.FLOAT_MODETom Stellard2015-03-093-1/+4
| | | | Reviewed-by: Marek Olšák <[email protected]>
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