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path: root/src/gallium/drivers/radeonsi
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* radeonsi: move clip plane constant buffer to RW buffersMarek Olšák2016-04-224-14/+12
* radeonsi: rework polygon stippling to use constant buffer instead of textureMarek Olšák2016-04-226-101/+55
* radeonsi: generalize si_set_constant_bufferMarek Olšák2016-04-221-10/+17
* radeonsi: make RW buffer descriptor array global, not per shader stageMarek Olšák2016-04-222-51/+43
* radeonsi: rename and rearrange RW buffer slotsMarek Olšák2016-04-224-30/+39
* radeonsi: Add config parameter to si_shader_apply_scratch_relocs.Bas Nieuwenhuizen2016-04-214-3/+5
* radeonsi: Enable loading into CE RAM.Bas Nieuwenhuizen2016-04-213-0/+14
* radeonsi: Use defines for CONTEXT_CONTROL instead of magic values.Bas Nieuwenhuizen2016-04-212-2/+5
* radeonsi: enable TGSI support cap for compute shadersBas Nieuwenhuizen2016-04-191-2/+14
* radeonsi: Consider input SGPR count for compute shader SGPR count.Bas Nieuwenhuizen2016-04-192-6/+13
* radeonsi: Add CE synchronization for compute dispatches.Bas Nieuwenhuizen2016-04-193-2/+8
* radeonsi: clean up compute flushBas Nieuwenhuizen2016-04-192-18/+8
* radeonsi: do not do two full flushes on every compute dispatchBas Nieuwenhuizen2016-04-195-22/+17
* radeonsi: split setting graphics and compute descriptorsBas Nieuwenhuizen2016-04-194-14/+59
* radeonsi: split texture decompression for compute shadersBas Nieuwenhuizen2016-04-194-4/+16
* radeonsi: update predicate condition for compute dispatchesBas Nieuwenhuizen2016-04-192-0/+15
* radeonsi: implement TGSI compute dispatchBas Nieuwenhuizen2016-04-191-27/+77
* radeonsi: only emit compute shader state when switching shadersBas Nieuwenhuizen2016-04-192-59/+88
* radeonsi: rework compute scratch bufferBas Nieuwenhuizen2016-04-193-93/+47
* radeonsi: do per cs setup for compute shaders once per csBas Nieuwenhuizen2016-04-193-32/+48
* radeonsi: don't pass scratch buffer to user SGPRsBas Nieuwenhuizen2016-04-191-8/+0
* radeonsi: split input upload off from si_launch_gridBas Nieuwenhuizen2016-04-191-41/+52
* radeonsi: implement TGSI compute shader creationBas Nieuwenhuizen2016-04-191-18/+58
* radeonsi: update shader count for compute shadersBas Nieuwenhuizen2016-04-191-1/+2
* radeonsi: set maximum work group size based on block sizeBas Nieuwenhuizen2016-04-191-0/+12
* radeonsi: implement shared atomicsBas Nieuwenhuizen2016-04-191-1/+76
* radeonsi: implement shared memory load/storeBas Nieuwenhuizen2016-04-191-2/+82
* radeonsi: add shared memoryBas Nieuwenhuizen2016-04-192-0/+30
* radeonsi: lower compute shader argumentsBas Nieuwenhuizen2016-04-192-0/+50
* radeonsi: Use CE for all descriptors.Bas Nieuwenhuizen2016-04-191-10/+64
* radeonsi: Replace list_dirty with a mask.Bas Nieuwenhuizen2016-04-192-17/+29
* radeonsi: Add CE uploader.Bas Nieuwenhuizen2016-04-193-0/+37
* radeonsi: Allocate chunks of CE ram.Bas Nieuwenhuizen2016-04-192-9/+27
* radeonsi: Add CE synchronization.Bas Nieuwenhuizen2016-04-192-0/+27
* radeonsi: Add CE packet definitions.Bas Nieuwenhuizen2016-04-191-0/+6
* radeonsi: Create CE IB.Bas Nieuwenhuizen2016-04-193-1/+52
* radeonsi: use enums in si_shader.hMarek Olšák2016-04-181-93/+119
* radeonsi: always use PFP_SYNC_ME when doing flushes and waitsMarek Olšák2016-04-182-1/+10
* radeonsi: don't do VS/PS partial flushes if SURFACE_SYNC waits tooMarek Olšák2016-04-181-11/+14
* radeonsi: add safety assertions for meta cache flushesMarek Olšák2016-04-181-0/+4
* radeonsi: don't use ACQUIRE_MEM on the graphics ringMarek Olšák2016-04-181-18/+8
* radeonsi: remove TODO and correct a comment in si_emit_cache_flushMarek Olšák2016-04-181-2/+1
* radeonsi: don't flush CB/DB caches for performance countersMarek Olšák2016-04-181-3/+6
* radeonsi: mark ssbo and images descriptor pointers dirty at beginning of CSNicolai Hähnle2016-04-141-0/+2
* radeonsi: don't overwrite the scratch offset in shader prologsMarek Olšák2016-04-141-3/+4
* radeonsi: fold num_user_sgprs where it is possibleMarek Olšák2016-04-141-16/+4
* radeonsi: fix SGPRS calculation once moreMarek Olšák2016-04-142-55/+23
* radeonsi: disable hw ETC2 on PolarisMarek Olšák2016-04-141-1/+1
* radeonsi: gate PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT by LLVM versionNicolai Hähnle2016-04-131-1/+2
* gallium/radeon: add an env variable to force a level of aniso filteringMarek Olšák2016-04-131-3/+7
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