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* radeonsi: Use dummy pixel shader if compilation of the real shader failedMichel Dänzer2014-10-073-7/+22
| | | | | | | Instead of crashing. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79155#c5 Reviewed-by: Marek Olšák <[email protected]>
* tgsi: change tgsi_shader_info::properties to a one-dimensional arrayMarek Olšák2014-10-042-5/+5
| | | | | | Reviewed-by: Roland Scheidegger <[email protected]> v2: fix svga too
* radeonsi: set number of userdata SGPRs of GS copy shader to 4Marek Olšák2014-10-043-10/+23
| | | | | | | It only needs the constant buffer with clip planes and read-write resources for the GS->VS ring and streamout. That's 2 pointers. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: pass the GS shader directly to si_generate_gs_copy_shaderMarek Olšák2014-10-041-3/+3
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: set LLVMByValAttribute for all descriptor arraysMarek Olšák2014-10-041-10/+7
| | | | | | I hope this is correct. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: make the vertex shader key smallerMarek Olšák2014-10-041-1/+2
| | | | | | We only support 16 vertex attribs, not 32. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: don't flush shader caches when building PM4 shader statesMarek Olšák2014-10-041-8/+0
| | | | | | | | | This is a wrong place to flush caches to say the least. I don't think we need to flush the instruction caches if we don't patch shaders with DMA. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: remove interp_at_sample from the key, use TGSI_INTERPOLATE_LOC_SAMPLEMarek Olšák2014-10-043-5/+2
| | | | | | | | | st/mesa has the same flag in its shader key, we don't need to do it in the driver anymore. Instead, use TGSI_INTERPOLATE_LOC_SAMPLE, which is what st/mesa sets. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: move geometry shader properties from si_shader to si_shader_selectorMarek Olšák2014-10-044-29/+38
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: always compile shaders on demandMarek Olšák2014-10-041-13/+3
| | | | | | | The first compiled shader is sometimes useless, because the key doesn't match the key for the draw call where it's used. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: remove unused variable si_shader::gs_input_primMarek Olšák2014-10-042-3/+0
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: get fs_write_all from tgsi_shader_info directlyMarek Olšák2014-10-043-16/+3
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* tgsi: simplify shader properties in tgsi_shader_infoMarek Olšák2014-10-041-36/+17
| | | | Use an array of properties indexed by TGSI_PROPERTY_* definitions.
* radeonsi: get tgsi_shader_info only once before compilationMarek Olšák2014-10-043-21/+16
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: fix CS tracing and remove excessive CS dumpingMarek Olšák2014-10-043-35/+25
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* radeonsi: Clear sampler view flags when binding a bufferMichel Dänzer2014-10-031-0/+5
| | | | | | | | | Fixes assertion failure while running the Unreal Engine 4 Elemental demo: .../si_blit.c:322:si_decompress_color_textures: Assertion `tex->cmask.size || tex->fmask.size' failed. Cc: "10.2 10.3" <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Pass the slice size to si_dma_copy_bufferMichel Dänzer2014-09-301-4/+4
| | | | | | Otherwise some parts of tiled slices can be missed. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Catch more cases that can't be handled by si_dma_copy_buffer/tileMichel Dänzer2014-09-301-3/+11
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Fix si_dma_copy(_tile) for compressed formatsMichel Dänzer2014-09-301-2/+2
| | | | | | | Fixes GPUVM faults when running the piglit test "getteximage-formats init-by-rendering" with R600_DEBUG=forcedma on SI. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Fix tiling mode index for stencil resourcesMichel Dänzer2014-09-301-2/+3
| | | | | | | | | | | We are currently only dealing with depth-only or stencil-only resources here, not with resources having both depth and stencil[0]. In both cases, the tiling mode index is in the tile_mode field, not in the stencil_tile_mode field. [0] Add an assertion for that. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: remove old cache flushing codeMarek Olšák2014-09-244-66/+1
| | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi/compute: do CS partial flush with si_emit_cache_flushMarek Olšák2014-09-242-6/+8
| | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi/compute: flush caches with si_emit_cache_flushMarek Olšák2014-09-242-23/+29
| | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi/compute: directly emit CONTEXT_CONTROLMarek Olšák2014-09-241-1/+5
| | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: properly destroy the GS copy shader and scratch_bo for computeMarek Olšák2014-09-242-3/+8
| | | | | Cc: 10.2 10.3 <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: release GS rings at context destructionMarek Olšák2014-09-241-0/+2
| | | | | Cc: 10.2 10.3 <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: don't use pipe_constant_buffer for GS ringsMarek Olšák2014-09-244-26/+22
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: don't pass the context to the shader translatorMarek Olšák2014-09-244-22/+18
| | | | | | This should prevent accessing context state there. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: don't snoop currently-bound GS shader when compiling ESMarek Olšák2014-09-243-16/+101
| | | | | | | | | Instead, pass the layout of GS inputs in memory to the ES using the shader key. Only 64 bits are needed to represent the layout in the key. Mixing and matching different VS and GS shaders should now always work. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: shorten si_pipe_* prefixes to si_*Marek Olšák2014-09-248-58/+57
| | | | | | | This was the original naming convention in r600g and it somehow crept into radeonsi. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: merge si_pipe_shader into si_shaderMarek Olšák2014-09-245-92/+90
| | | | | | One is part of the other anyway. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: disable gl_SampleMask fragment shader output if MSAA is disabledMarek Olšák2014-09-241-3/+18
| | | | | | This fixes piglit: arb_sample_shading-builtin-gl-sample-mask 0 Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: only update MSAA-specific framebuffer state if nr_samples is changedMarek Olšák2014-09-241-23/+27
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: move DB_SHADER_CONTROL into db_render_stateMarek Olšák2014-09-244-13/+18
| | | | | | | | | I will need this for fixing sample shading with 1 sample. The good news is that all shader pm4 states no longer use the current context state, so we can generate the pm4 states outside of draw_vbo if needed. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: set KILL_ENABLE during shader compilation, remove uses_kill flagMarek Olšák2014-09-243-5/+5
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: remove shader.ps_conservative_z, set db_shader_control insteadMarek Olšák2014-09-243-8/+4
| | | | | | Also set the field on SI too. It's not just specific to CIK. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: move DB registers from draw_vbo into new db_render_stateMarek Olšák2014-09-245-66/+82
| | | | | | It's called db_misc_state in r600g. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: remove unused variable si_pipe_shader::sprite_coord_enableMarek Olšák2014-09-242-2/+0
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: document what si_descriptors.c doesMarek Olšák2014-09-241-0/+11
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* gallium/r300,r600,radeonsi: add automake target 'templates'Emil Velikov2014-09-241-0/+16
| | | | | | | | | Rather than duplicating the libdeps, extra define... all over the targets, define them only once and use when applicable. Signed-off-by: Emil Velikov <[email protected]> Acked-by: Christian König <[email protected]> Acked-by: Matt Turner <[email protected]>
* r600g,radeonsi: add debug option which forces DMA for copy_region and blitMarek Olšák2014-09-124-9/+24
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* gallium: add a texture target to sampler view and a CAP to use itIlia Mirkin2014-09-121-0/+1
| | | | | | | | | | This allows a sampler view to have a different texture target than the underlying resource. This will be used to implement the type casting between 2d arrays and cube maps as specified in ARB_texture_view. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Simplify si_dma_copy_tile functionMichel Dänzer2014-09-111-62/+41
| | | | | | No functional change intended. Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeonsi: ship all files in the tarballEmil Velikov2014-09-052-0/+8
| | | | | | | | - include all headers in Makefile.sources - bundle the android buildscript Signed-off-by: Emil Velikov <[email protected]> Acked-by: Matt Turner <[email protected]>
* radeonsi: Compile dummy pixel shader on demandMichel Dänzer2014-09-022-8/+10
| | | | | | It's never used under normal circumstances. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: implement EXPCLEAR optimization for depthMarek Olšák2014-09-014-2/+22
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: implement fast depth clearMarek Olšák2014-09-014-2/+21
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: move DB_RENDER_CONTROL into draw_vboMarek Olšák2014-09-015-58/+46
| | | | | | So that I can add fast depth clear. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: disable occlusion queries if they are not neededMarek Olšák2014-09-011-0/+8
| | | | | | | We always left them enabled, which turned off HiZ in some cases. This should improve performace with Hyper-Z. Reviewed-by: Michel Dänzer <[email protected]>
* r600g,radeonsi: force fast stencil and HTILE stencil off, fixing a Hyper-Z hangMarek Olšák2014-09-011-8/+10
| | | | | | | | | | | | | This should be as fast as no HTILE for stencil. I think we can still get full performance with depth-only rendering even if stencil is present in the buffer but not used, but I'm not 100% sure. This may be revisited when HiS and fast stencil clear are implemented. This fixes a hang in Brutal Legend. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=64471 Reviewed-by: Michel Dänzer <[email protected]>
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