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* radeonsi: enable ARB_shader_ballotNicolai Hähnle2017-04-051-1/+3
| | | | | | | | Require LLVM 5.0 or later because LLVM 4.0 is easily fooled into putting the lane select of llvm.amdgcn.readlane into a VGPR and then fails to continue to compile. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: optimization barriers to work around LLVM deficienciesNicolai Hähnle2017-04-051-4/+12
| | | | | | | | | | | | | | | | | | | | | | | | | Notably, llvm.amdgcn.readfirstlane and llvm.amdgcn.icmp may be hoisted out of loops or if/else branches in cases like if (cond) { v = readFirstInvocationARB(x); ... use v ... } else { v = readFirstInvocationARB(x); ... use v ... } ===> v = readFirstInvocationARB(x); if (cond) { ... use v ... } else { ... use v ... } The optimization barrier is a heavy hammer to stop that until LLVM is taught the semantics of the intrinsic properly. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: strengthen emit_optimization_barrierNicolai Hähnle2017-04-052-4/+38
| | | | | | | | | | | | | LLVM will lift inline assembly out of if-else-blocks if both paths have the same inline assembly. Prevent this by adding an irrelevant unique text to the assembly. This requires the LLVM assembly parser to be initialized. Furthermore, allow forcing subsequent computations to happen after the optimization barrier by defining a data dependency. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: emit TGSI_OPCODE_READ_*Nicolai Hähnle2017-04-051-0/+38
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: emit TGSI_OPCODE_BALLOTNicolai Hähnle2017-04-051-0/+18
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: implement TGSI_SEMANTIC_SUBGROUP_*Nicolai Hähnle2017-04-051-0/+40
| | | | | | 64-bit system values are stored as v2i32 to simplify the fetch logic. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: support 64-bit system valuesNicolai Hähnle2017-04-051-4/+20
| | | | | | | For simplicitly, always store system values as 32-bit values or arrays of 32-bit values. 64-bit values are unpacked and packed accordingly. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: bump RADEON_LLVM_MAX_SYSTEM_VALUESNicolai Hähnle2017-04-052-1/+3
| | | | | | | ARB_shader_ballot introduces 7 new system values that can be used in all shader stages. Reviewed-by: Marek Olšák <[email protected]>
* gallium: add PIPE_CAP_TGSI_BALLOTNicolai Hähnle2017-04-051-0/+1
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: enable ARB_sparse_bufferNicolai Hähnle2017-04-051-1/+10
| | | | | | | | v2: - fill in DRM version requirement - disable on SI due to CP DMA faults Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: disable SDMA clears and copies for sparse buffersNicolai Hähnle2017-04-053-4/+11
| | | | | | | | | VM faults cannot be disabled for SDMA on <= VI. We could still use SDMA by asking the winsys about which parts of the buffers are committed. This is left as a potential future improvement. Reviewed-by: Marek Olšák <[email protected]>
* gallium: add sparse buffer interface and capabilityNicolai Hähnle2017-04-051-0/+1
| | | | | | | v2: - explain the resource_commit interface in more detail Reviewed-by: Marek Olšák <[email protected]>
* r600g/radeonsi: use the correct types (taken from pipe_draw_info)Constantine Kharlamov2017-04-042-3/+4
| | | | | | | | | | | Note: si_shader.h has also "type" variable that should be changed to "enum pipe_prim_type", however it triggers a bunch of warnings about unhandled switches, so due not knowing the correct way to handle them, I decided to leave it as is. Signed-off-by: Constantine Kharlamov <[email protected]> Signed-off-by: Marek Olšák <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* radeonsi: access gallivm through ctx in most placesMarek Olšák2017-04-043-87/+79
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use ctx->types instead of bld->types etc.Marek Olšák2017-04-042-23/+21
| | | | | | even vec_type is f32. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use i32_0/1 instead of *int_bld.zero/one in most placesMarek Olšák2017-04-042-55/+47
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use i32_0 and i32_1 moreMarek Olšák2017-04-041-16/+16
| | | | | Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove most uses of lp_build_const*Marek Olšák2017-04-043-151/+145
| | | | | Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: clean up 'radeon_bld' referencesMarek Olšák2017-04-041-60/+48
| | | | | Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fix broken texture filtering on SI-CIK since GFX9 changesMarek Olšák2017-04-041-15/+17
| | | | | | | | Don't clear state[7] on SI-CIK, and only do the meta stuff on VI+. Fixes: 5abf60076ce4 ("radeonsi/gfx9: image descriptor changes in mutable fields") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100531 Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use unreachable to fix a warningGrazvydas Ignotas2017-04-031-2/+2
| | | | | | | | | si_state.c: In function ‘si_make_texture_descriptor’: si_state.c:3240:25: warning: ‘num_format’ may be used uninitialized si_state.c:3240:12: warning: ‘data_format’ may be used uninitialized Signed-off-by: Grazvydas Ignotas <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* radeonsi: add load_image_desc()Samuel Pitoiset2017-04-011-21/+24
| | | | | | | | Similar to load_sampler_desc(). Same deal for bindless. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: rework the load_sampler_desc() helpersSamuel Pitoiset2017-04-011-16/+10
| | | | | | | | | | Will be more convenient for bindless because the 64bit handle is actually the base_ptr of the descriptor (ie. 'list' will be fetched from TGSI_FILE_CONSTANT/TGSI_FILE_TEMPORARY instead). Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium: Add a cap to check if the driver supports fill_rectangleLyude2017-03-311-0/+1
| | | | | | | | Changes since v1: - Add pipe caps for etnaviv, freedreno, swr and virgl Signed-off-by: Lyude <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* gallium: remove support for predicates from TGSI (v2)Marek Olšák2017-04-011-1/+0
| | | | | | | | | | | Neved used. v2: gallivm: rename "pred" -> "exec_mask" etnaviv: remove the cap gallium: fix tgsi_instruction::Padding Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* radeonsi/gfx9: don't compare src_va w/ dst_va for CP_DMA_CLEARMarek Olšák2017-03-311-1/+2
| | | | | | src_va contains the clear value in this case. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: fix 1D array fetches with derivs, bias, or Z compare valueMarek Olšák2017-03-311-1/+1
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: fix and enable MSAA compressionMarek Olšák2017-03-312-5/+3
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: disable CEMarek Olšák2017-03-311-1/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: add tests verifying that VM faults don't hangMarek Olšák2017-03-311-0/+37
| | | | | | GFX9 hangs instead of writing VM faults to dmesg. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: unify HS max_offchip_buffers workaroundsMarek Olšák2017-03-311-3/+3
| | | | | | Vulkan doesn't set more than 508. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: adjust checking for SC bug workaroundsMarek Olšák2017-03-313-4/+13
| | | | | | | no change in behavior, just making sure that no later chips will use the workarounds Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: decompress DCC in set_sampler_view instead of create_sampler_view (v2)Marek Olšák2017-03-313-6/+16
| | | | | | v2: don't add a new decompress helper function Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: decompress DCC in set_framebuffer_state instead of create_surface (v2)Marek Olšák2017-03-311-0/+29
| | | | | | | | for threaded gallium, which can't use pipe_context in create_surface v2: don't add a new decompress helper function Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: implement ARB_shader_group_voteNicolai Hähnle2017-03-312-1/+85
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: enable ARB_shader_clockNicolai Hähnle2017-03-311-1/+1
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: emit TGSI_OPCODE_CLOCKNicolai Hähnle2017-03-311-0/+21
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium: add PIPE_CAP_TGSI CLOCKNicolai Hähnle2017-03-311-0/+1
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: s/dcc_disable/disable_dcc/Marek Olšák2017-03-302-6/+6
| | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi: handle incompatible DCC formats in resource_copy_regionMarek Olšák2017-03-301-0/+5
| | | | | | | Required because of later commits. Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Edmondo Tommasina <[email protected]>
* radeonsi: remove a workaround for inexact *8_SNORM blitsMarek Olšák2017-03-301-3/+1
| | | | | | | | All tests pass on Fiji now. This prevents DCC disablement due to incompatible DCC formats due to the fallback. Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Edmondo Tommasina <[email protected]>
* gallium/radeon: add and use a new helper vi_dcc_enabledMarek Olšák2017-03-303-8/+5
| | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi: don't make a copy of pipe_index_buffer in draw_vboMarek Olšák2017-03-301-32/+27
| | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radeon/uvd: adapt gfx9 surface to uvdLeo Liu2017-03-301-2/+6
| | | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeonsi/gfx9: disable features that don't workMarek Olšák2017-03-303-4/+8
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: only allow GL 3.1Marek Olšák2017-03-301-0/+5
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: don't generate LS and ES statesMarek Olšák2017-03-301-24/+46
| | | | | | these shaders don't exist on GFX9 Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: SPI_SHADER_USER_DATA changesMarek Olšák2017-03-301-11/+34
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: add radeon_surf.gfx9.surf_offsetMarek Olšák2017-03-302-0/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: don't write mipmap level offsets to BO metadataMarek Olšák2017-03-301-3/+6
| | | | | | GFX9 doesn't have (usable) mipmap offsets. Reviewed-by: Nicolai Hähnle <[email protected]>
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