| Commit message (Collapse) | Author | Age | Files | Lines |
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Keep together the parts that won't use the deferred logging mechanism.
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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To allow keep-alive for deferred logging.
Reviewed-by: Marek Olšák <[email protected]>
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We'll add radeonsi-specific code to set_log_context in later patches,
but we may want to log from common code. Hence keep the log pointer
in r600_common_context.
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
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Both statically linking libLLVMCore and dynamically linking libLLVM causes
duplicated symbols in gallium_dri.so and it fails to dlopen. We don't
really need to link libLLVMCore, but just need generated headers to be
built first. Dynamically linking to libLLVM instead is enough to do
that. Thanks to Qiang Yu for finding the root cause.
With this change, we can align all versions and just have libLLVM as a
shared lib dependency.
This also requires changes in the M and N versions of LLVM to export the
include paths for libLLVM. AOSP master is okay.
Fixes: 26aee6f4d5a ("Android: rework LLVM build support")
Reported-by: Mauro Rossi <[email protected]>
Cc: 17.2 <[email protected]>
Reviewed-by: Emil Velikov <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Signed-off-by: Rob Herring <[email protected]>
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Make chroma plane optional for YUYV support
Signed-off-by: Leo Liu <[email protected]>
Reviewed-by: Christian König <[email protected]>
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Only resident bindless descriptors are currently updated and
re-uploaded, this makes sure that the non-resident ones are
also updated.
Signed-off-by: Samuel Pitoiset <[email protected]>
Cc: "17.2" <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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just use the new scratch buffer.
Reviewed-by: Nicolai Hähnle <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
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This fixes random hangs with Unigine Valley.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102201
Fixes: 064550238ef0 ("radeonsi: use CLEAR_STATE to initialize some registers")
Reviewed-by: Nicolai Hähnle <[email protected]>
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It makes performance worse by a very small (hard to measure) amount.
We've done extensive profiling of this feature internally.
Cc: 17.1 17.2 <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Acked-by: Christian König <[email protected]>
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otherwise there is corruption in most apps.
Fixes: 0fe0320 radeonsi: use optimal packet order when doing a pipeline sync
Reviewed-by: Nicolai Hähnle <[email protected]>
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This fixes corrupted shadows in Unigine Valley.
The corruption disappeared when I stopped setting IMG_DATA_FORMAT_24_8
for depth.
Cc: 17.2 <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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UE4Editor has this issue.
This commit prevents hangs (release build) or assertion failures (debug
build). It doesn't fix the editor, but catastrophic scenarios are
prevented.
Cc: 17.1 17.2 <[email protected]>
Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Samuel Pitoiset <[email protected]>
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Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Process most new SET packets in parallel with previous draw calls, then
flush caches and wait, start the draw, and do L2 prefetches last.
This decreases the [CP busy / SPI busy] ratio (verified with GRBM perf
counters). In other words, the time window when shaders are idle (between
(the wait and the draw) is much shorter now.
Tested-by: Dieter Nützel <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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Tested-by: Dieter Nützel <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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Tested-by: Dieter Nützel <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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Tested-by: Dieter Nützel <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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so that we don't rely on si_pm4_state_enabled_and_changed, allowing us
to move prefetches after draw calls.
v2: ckear the dirty mask after unbinding shaders
Tested-by: Dieter Nützel <[email protected]> (v1)
Reviewed-by: Nicolai Hähnle <[email protected]> (v1)
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Tested-by: Dieter Nützel <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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I'd like to be able to move the prefetch call site around.
Tested-by: Dieter Nützel <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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Tested-by: Dieter Nützel <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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Tested-by: Dieter Nützel <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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v2: fix an indentation error
v3: don't enable for r600
Signed-off-by: Andres Rodriguez <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
Reviewed-by: Timothy Arceri <[email protected]>
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v2: move from r600_common to radeonsi
Signed-off-by: Andres Rodriguez <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Android build changes to avoid the following building error:
target C: libmesa_pipe_radeonsi <= external/mesa/src/gallium/drivers/radeonsi/si_pipe.c
...
In file included from external/mesa/src/gallium/drivers/radeonsi/si_pipe.c:38:
external/mesa/src/compiler/nir/nir.h:48:10: fatal error: 'nir_opcodes.h' file not found
^
1 error generated.
Fixes: da62a31c5b "radeonsi: add nir include paths"
Reviewed-by: Emil Velikov <[email protected]>
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Also, access the options directly, allowing us to get rid of the
PIPE_SCREEN_xxx flags.
Tested-by: Dieter Nützel <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Emil Velikov <[email protected]>
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Reviewed-by: Dave Airlie <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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Reviewed-by: Dave Airlie <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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Android build changes to avoid the following building error:
In file included from external/mesa/src/gallium/targets/dri/target.c:1:
external/mesa/src/gallium/auxiliary/target-helpers/drm_helper.h:185:10:
fatal error: 'radeonsi/si_driinfo.h' file not found
^
1 error generated.
Fixes: 0f8c5de869 "radeonsi: prepare for driver-specific driconf options"
Reviewed-by: Emil Velikov <[email protected]>
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This can be used to guard support for EXT_memory_object and related
extensions.
v2: update gallium docs
v3 (Timothy Arceri):
- add cap to nv50
Signed-off-by: Andres Rodriguez <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
Reviewed-by: Samuel Pitoiset <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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This allows a more generic mechanism for passing user configurations
into drivers by accessing the dri options directly.
Reviewed-by: Marek Olšák <[email protected]>
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v2: update for new cap name
Reviewed-by: Marek Olšák <[email protected]>
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v2: rename cap to PIPE_CAP_QUERY_SO_OVERFLOW and be a bit more explicit
in the documentation
Reviewed-by: Roland Scheidegger <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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This looks like it's supported since llvm 3.9 at least,
so switch over radeonsi and radv to using it, -pro also
uses this. We can now drop creating lds for these operations
as the ds_swizzle operation doesn't actually write to lds at all.
Acked-by: Marek Olšák <[email protected]>
(stable requested due to fixing radv CIK conformance tests)
Cc: [email protected]
Signed-off-by: Dave Airlie <[email protected]>
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Reviewed-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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Reviewed-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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I don't know the condition for the flush, but we better turn this off.
The sL1 flush is used when CE dumps stuff into a ring buffer and the ring
buffer wraps.
Reviewed-by: Nicolai Hähnle <[email protected]>
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Compression isn't enabled with non-zero levels.
Reviewed-by: Nicolai Hähnle <[email protected]>
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Fixes: 064550238ef0 ("radeonsi: use CLEAR_STATE to initialize some
registers")
Bugzilla: https://bugs.freedesktop.org/101969
Tested-by: Michel Dänzer <[email protected]>
Reviewed-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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Otherwise, code generation fails. This has become necessary since some
shaders are wrapped in control flow.
Fixes: 081ac6e5c6d2 ("radeonsi/gfx9: always wrap GS and TCS in an if-block (v2)")
Cc: [email protected]
Reviewed-by: Marek Olšák <[email protected]>
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Also, disable geometry and tessellation shaders. Mixing and matching NIR
and TGSI shaders should work (and I've tested it for the VS/PS interface),
but geometry and tessellation requires VS-as-ES/LS, which isn't implemented
yet for NIR.
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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