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path: root/src/gallium/drivers/radeonsi
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* radeonsi: disable the constant engine (CE) on Carrizo and StoneyMarek Olšák2016-12-081-1/+4
* radeonsi: Fix typo: "llvm.fs.interp" => "llvm.SI.fs.interp"Michel Dänzer2016-12-081-1/+1
* radeonsi: wait for outstanding LDS instructions in memory barriers if neededMarek Olšák2016-12-071-1/+17
* radeonsi: wait for outstanding memory instructions in TCS barriersMarek Olšák2016-12-071-1/+5
* radeonsi: allow specifying simm16 of emit_waitcnt at call sitesMarek Olšák2016-12-071-5/+7
* radeonsi: write shader descriptors into hang reportsMarek Olšák2016-12-073-0/+117
* radeonsi: check for sampler state CSO corruptionMarek Olšák2016-12-073-0/+17
* radeonsi: properly declare context sampler statesMarek Olšák2016-12-073-4/+4
* radeonsi: fix incorrect FMASK checking in bind_sampler_statesMarek Olšák2016-12-071-4/+4
* radeonsi: always restore sampler states when unbinding sampler viewsMarek Olšák2016-12-071-3/+8
* radeonsi: take LDS into account for compute shader occupancy statsMarek Olšák2016-12-071-11/+18
* radeonsi: fix isolines tess factor writes to control ringNicolai Hähnle2016-12-071-4/+12
* radeonsi: Use amdgcn intrinsics for fs interpolationTom Stellard2016-12-071-54/+142
* gallium: support for native fence fd'sRob Clark2016-12-011-0/+1
* radeonsi: add a tess+GS hang workaround for VI dGPUsMarek Olšák2016-12-011-2/+10
* radeonsi: don't apply the Z export bug workaround to HainanMarek Olšák2016-12-011-2/+3
* radeonsi: apply a tessellation bug workaround for SIMarek Olšák2016-12-011-0/+7
* radeonsi: apply a TC L1 write corruption workaround for SIMarek Olšák2016-12-011-11/+23
* radeonsi: apply a multi-wave workgroup SPI bug workaround to affected CIK chipsMarek Olšák2016-12-014-4/+29
* radeonsi: consolidate max-work-group-size computationMarek Olšák2016-12-011-24/+19
* gallium: add PIPE_CAP_TGSI_CAN_READ_OUTPUTSNicolai Hähnle2016-11-301-0/+1
* radeonsi: don't fetch 8 dwords for samplerBuffer and imageBufferMarek Olšák2016-11-291-51/+43
* radeonsi: disable XNACK to free 2 SGPRs on APUsMarek Olšák2016-11-291-1/+1
* radeonsi: count and report temp arrays in scratch separatelyMarek Olšák2016-11-292-4/+40
* radeonsi: don't try to eliminate trivial VS outputs for PS and CSMarek Olšák2016-11-291-1/+4
* radeonsi: disable RB+ blend optimizations for dual source blendingMarek Olšák2016-11-291-0/+11
* radeonsi: set CB_BLEND1_CONTROL.ENABLE for dual source blendingMarek Olšák2016-11-291-0/+4
* radeonsi: always set all blend registersMarek Olšák2016-11-291-5/+5
* radeonsi: set the smallest possible CB_TARGET_MASKMarek Olšák2016-11-291-5/+5
* radeonsi: don't print bodies of header-only packetsMarek Olšák2016-11-291-0/+4
* radeonsi: print unknown registers with correct formattingMarek Olšák2016-11-291-1/+2
* radeonsi: print new opt flags in si_dump_shader_keyMarek Olšák2016-11-231-0/+9
* radeonsi: add a debug flag that disables optimized shader variantsMarek Olšák2016-11-231-0/+5
* util: import CRC32 implementation from galliumMarek Olšák2016-11-221-1/+1
* radeonsi: remove all varyings for depth-only rendering or rasterization offMarek Olšák2016-11-213-1/+21
* radeonsi: eliminate VS outputs that aren't used by PS at runtimeMarek Olšák2016-11-213-9/+61
* radeonsi: record information about all written and read varyingsMarek Olšák2016-11-213-3/+98
* radeonsi: make si_shader_io_get_unique_index stricterMarek Olšák2016-11-212-11/+14
* radeonsi: don't export ClipVertex and ClipDistance[] if clipping is disabledMarek Olšák2016-11-214-5/+37
* radeonsi: add infrastr. for compiling optimized shader variants asynchronouslyMarek Olšák2016-11-212-34/+109
* radeonsi: don't set vs.epilog.export_prim_id if TES is boundMarek Olšák2016-11-211-4/+4
* radeonsi: simplify checking for monolithic compilationMarek Olšák2016-11-214-8/+9
* radeonsi: print all flags in si_dump_shader_keyMarek Olšák2016-11-211-0/+5
* radeonsi: split the shader key into 3 logical partsMarek Olšák2016-11-215-194/+203
* radeonsi: fix culling if clip & cull distances are used at the same timeMarek Olšák2016-11-211-2/+3
* radeonsi: clean up si_emit_clip_regsMarek Olšák2016-11-211-4/+5
* radeonsi: assume that a VS without POSITION is LSMarek Olšák2016-11-211-0/+7
* radeonsi: decrease the number of texture slots to 24Marek Olšák2016-11-211-1/+1
* radeonsi: fast exit si_emit_derived_tess_state earlyMarek Olšák2016-11-212-11/+15
* radeonsi: check for !is_linear in do_hardware_msaa_resolveMarek Olšák2016-11-211-2/+4