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* radeonsi: remove unused parameter from si_shader_binary_read_configMarek Olšák2016-01-033-10/+7
| | | | | Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: move si_shader_binary_upload out of si_shader_binary_readMarek Olšák2016-01-033-11/+10
| | | | | Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: dump LLVM module outside of radeon_llvm_compileMarek Olšák2016-01-031-4/+6
| | | | | Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: always add +DumpCode to the LLVM target machine for LLVM <= 3.5Marek Olšák2016-01-031-1/+1
| | | | | | | It's the same behavior that we use for later LLVM. Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: r600_can_dump_shader should get TGSI processor type directlyMarek Olšák2016-01-031-6/+3
| | | | | Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: pass TGSI processor type to si_shader_binary_read for dumpingMarek Olšák2016-01-033-4/+5
| | | | | | | the parameter will be used later Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: pass TGSI processor type to si_compile_llvm for dumpingMarek Olšák2016-01-033-5/+5
| | | | | | | the parameter will be used later Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: rename shader parameter definitions and variables for more clarityMarek Olšák2016-01-033-43/+43
| | | | | Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium: add PIPE_CAP_TGSI_PACK_HALF_FLOAT to indicate UP2H/PK2H supportIlia Mirkin2016-01-031-0/+1
| | | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* gallium/radeon: pass pipe_debug_callback into radeon_llvm_compile (v2)Nicolai Hähnle2016-01-021-1/+2
| | | | | | | This will allow us to send shader debug info via the context's debug callback. Reviewed-by: Edward O'Callaghan <[email protected]> (v1) Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: send shader info as debug messages in addition to stderr outputNicolai Hähnle2016-01-021-14/+55
| | | | | | | | | | | | | | The output via stderr is very helpful for ad-hoc debugging tasks, so that remains unchanged, but having the information available via debug messages as well will allow the use of parallel shader-db runs. Shader stats are always provided (if the context is a debug context, that is), but you still have to enable the appropriate R600_DEBUG flags to get disassembly (since it is rather spammy and is only generated by LLVM when we explicitly ask for it). Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: pass pipe_debug_callback down into si_shader_binary_read (v2)Nicolai Hähnle2016-01-024-14/+22
| | | | | | | This will allow us to send shader debug info. Reviewed-by: Edward O'Callaghan <[email protected]> (v1) Reviewed-by: Marek Olšák <[email protected]>
* u_upload_mgr: pass alignment to u_upload_data manuallyMarek Olšák2016-01-021-1/+1
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* u_upload_mgr: pass alignment to u_upload_alloc manuallyMarek Olšák2016-01-022-4/+4
| | | | | | | | | | The fixed alignment of u_upload_mgr will go away. This is the first step. The motivation is that one u_upload_mgr can have multiple users, each allocating from the same buffer, but requiring a different alignment. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium: add PIPE_CAP_DRAW_PARAMETERSIlia Mirkin2015-12-301-0/+1
| | | | | | | | This allows the state tracker to know that the various draw parameters are available in vertex shaders. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* radeonsi: add RADEON_REPLACE_SHADERS debug optionNicolai Hähnle2015-12-293-5/+105
| | | | | | | | | | | This option allows replacing a single shader by a pre-compiled ELF object as generated by LLVM's llc, for example. This can be useful for debugging a deterministically occuring error in shaders (and has in fact helped find the causes of https://bugs.freedesktop.org/show_bug.cgi?id=93264). v2: drop the debug flag, use DEBUG_GET_ONCE_OPTION instead Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: count compilations in si_compile_llvmNicolai Hähnle2015-12-292-1/+2
| | | | | | | | This changes the count slightly (because of si_generate_gs_copy_shader), but this is only relevant for the driver-specific num-compilations query. It sets the stage for the next commit. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: fix viewport clipping handling. (v2)Dave Airlie2015-12-221-1/+4
| | | | | | | | | | | | | | | If oViewport is written, vertex reuse need to be turned off. If oViewport is constant, vertex reuse is fine, and VPORT_PROVOKE_DISABLE need to be set. (We don't know if oViewport is constant so we skip this.) Fixes: arb_viewport_array-render-viewport-2 and some CTS tests. v2: drop writing to provoke disable, drop write in initial state. Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi: fix perfcounter selection for SI_PC_MULTI_BLOCK layoutsNicolai Hähnle2015-12-151-1/+1
| | | | | | The incorrectly computed register count caused lockups. Reviewed-by: Edward O'Callaghan <[email protected]>
* gallium/radeon: remove radeon_winsys_cs_handleMarek Olšák2015-12-116-15/+13
| | | | | | | | "radeon_winsys_cs_handle *cs_buf" is now equivalent to "pb_buffer *buf". Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: implement fast stencil clearMarek Olšák2015-12-113-23/+51
| | | | Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: re-enable Hyper-Z for stencilMarek Olšák2015-12-111-9/+3
| | | | Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: don't use the CP DMA workaround on Fiji and newerMarek Olšák2015-12-111-16/+20
| | | | Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: apply the streamout workaround to Fiji as wellMarek Olšák2015-12-111-1/+3
| | | | | Cc: 11.0 11.1 <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: also print hexadecimal values for register fields in the IB parserMarek Olšák2015-12-111-4/+7
| | | | | Reviewed-by: Michel Dänzer <[email protected] Reviewed-by: Edward O'Callaghan <[email protected]>
* radeonsi: implement RB+ for Stoney (v2)Marek Olšák2015-12-112-2/+160
| | | | | | v2: fix dual source blending Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: don't call of u_prims_for_vertices for patches and rectanglesMarek Olšák2015-12-111-1/+13
| | | | | | | | | Both caused a crash due to a division by zero in that function. This is an alternative fix. Cc: 11.0 11.1 <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* radeonsi: use tgsi_shader_info::colors_writtenMarek Olšák2015-12-113-11/+1
| | | | Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: handle loading doubles as geometry shader inputs.Dave Airlie2015-12-091-4/+16
| | | | | | | | This adds the double code to the geometry shader input handling. Reviewed-by: Michel Dänzer <[email protected]> Cc: "11.0 11.1" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi: handle doubles in lds load path.Dave Airlie2015-12-091-0/+8
| | | | | | | | This handles loading doubles from LDS properly. Reviewed-by: Michel Dänzer <[email protected]> Cc: "11.0 11.1" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi: last_gfx_fence is a winsys fenceNicolai Hähnle2015-12-071-1/+1
| | | | | Cc: "11.1" <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/drivers: Sanitize NULL checks into canonical formEdward O'Callaghan2015-12-065-19/+19
| | | | | | | | | | Use NULL tests of the form `if (ptr)' or `if (!ptr)'. They do not depend on the definition of the symbol NULL. Further, they provide the opportunity for the accidental assignment, are clear and succinct. Signed-off-by: Edward O'Callaghan <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* gallium/radeon*: Remove useless castsEdward O'Callaghan2015-12-061-1/+1
| | | | | | | | These are unnecessary and are likely just left overs from prior work. Signed-off-by: Edward O'Callaghan <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* radeonsi: dump init_config IBsMarek Olšák2015-12-031-4/+15
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: print framebuffer info into ddebug logsMarek Olšák2015-12-031-0/+25
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: rename fmask::pitch -> pitch_in_pixelsMarek Olšák2015-12-031-2/+2
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeon: delay the generation of driver query names until first useNicolai Hähnle2015-11-261-8/+7
| | | | | | | This shaves a bit more time off the startup of programs that don't actually use performance counters. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/compute: Use the compiler's COMPUTE_PGM_RSRC* register valuesTom Stellard2015-11-252-31/+7
| | | | | | | | | The compiler has more information and is able to optimize the bits it sets in these registers. Reviewed-by: Marek Olšák <[email protected]> CC: <[email protected]>
* radeonsi: Rename si_shader::ls_rsrc{1,2} to si_shader::rsrc{1,2}Tom Stellard2015-11-253-6/+6
| | | | | | In the future, these will be used by other shaders types. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: implement AMD_performance_monitor for CIK+Nicolai Hähnle2015-11-254-0/+702
| | | | | | | | | | | | | | | | | | Expose most of the performance counter groups that are exposed by Catalyst. Ideally, the driver will work with GPUPerfStudio at some point, but we are not quite there yet. In any case, this is the reason for grouping multiple instances of hardware blocks in the way it is implemented. The counters can also be shown using the Gallium HUD. If one is interested to see how work is distributed across multiple shader engines, one can set the environment variable RADEON_PC_SEPARATE_SE=1 to obtain finer-grained performance counter groups. Part of the implementation is in radeon because an implementation for older hardware would largely follow along the same lines, but exposing a different set of blocks which are programmed slightly differently. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/sid: add performance counter registersNicolai Hähnle2015-11-251-0/+1013
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/sid: add hardware constants for COPY_DATA packetNicolai Hähnle2015-11-251-0/+3
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeon: extend CIK_UCONFIG_REG_END for performance countersNicolai Hähnle2015-11-251-1/+1
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: enable optimal raster config setting for fiji (v2)Alex Deucher2015-11-161-3/+9
| | | | | | | | | | | Requires proper kernel tiling configuration so check the tiling config registers. v2: send the right version of the patch Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
* radeonsi: use proper GRBM_GFX_INDEX offset for CI+Alex Deucher2015-11-161-4/+12
| | | | | | | The offset is different on CI and newer. Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* radeonsi: remove dead code after ES-GS linkage changeMarek Olšák2015-11-133-57/+0
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: link ES-GS just like LS-HSMarek Olšák2015-11-133-39/+19
| | | | | | | | | | | | This reduces the shader key for ES. Use a fixed attrib location based on (semantic name, index). The ESGS item size is determined by the physical index of the highest ES output, so it's almost always larger than before, but I think that shouldn't matter as long as the ESGS ring buffer is large enough. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: calculate optimal GS ring sizes to fix GS hangs on TongaMarek Olšák2015-11-135-47/+113
| | | | | | | | | | | | | | I discovered that increasing the ESGS ring size fixes GS hangs on Tonga, so let's do it properly. There is now a separate init_config_gs_rings state that is not immutable, because GS rings are resized when needed. This also saves some memory. Most apps won't need more than 1MB per ring per shader engine. Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: rename si_update_gs_ringsMarek Olšák2015-11-131-2/+2
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: calculate ESGS_RING_ITEMSIZE in create_shaderMarek Olšák2015-11-132-1/+3
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
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