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path: root/src/gallium/drivers/radeonsi
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* gallium/drivers: Sanitize NULL checks into canonical formEdward O'Callaghan2015-12-065-19/+19
* gallium/radeon*: Remove useless castsEdward O'Callaghan2015-12-061-1/+1
* radeonsi: dump init_config IBsMarek Olšák2015-12-031-4/+15
* radeonsi: print framebuffer info into ddebug logsMarek Olšák2015-12-031-0/+25
* gallium/radeon: rename fmask::pitch -> pitch_in_pixelsMarek Olšák2015-12-031-2/+2
* radeon: delay the generation of driver query names until first useNicolai Hähnle2015-11-261-8/+7
* radeonsi/compute: Use the compiler's COMPUTE_PGM_RSRC* register valuesTom Stellard2015-11-252-31/+7
* radeonsi: Rename si_shader::ls_rsrc{1,2} to si_shader::rsrc{1,2}Tom Stellard2015-11-253-6/+6
* radeonsi: implement AMD_performance_monitor for CIK+Nicolai Hähnle2015-11-254-0/+702
* radeonsi/sid: add performance counter registersNicolai Hähnle2015-11-251-0/+1013
* radeonsi/sid: add hardware constants for COPY_DATA packetNicolai Hähnle2015-11-251-0/+3
* radeon: extend CIK_UCONFIG_REG_END for performance countersNicolai Hähnle2015-11-251-1/+1
* radeonsi: enable optimal raster config setting for fiji (v2)Alex Deucher2015-11-161-3/+9
* radeonsi: use proper GRBM_GFX_INDEX offset for CI+Alex Deucher2015-11-161-4/+12
* radeonsi: remove dead code after ES-GS linkage changeMarek Olšák2015-11-133-57/+0
* radeonsi: link ES-GS just like LS-HSMarek Olšák2015-11-133-39/+19
* radeonsi: calculate optimal GS ring sizes to fix GS hangs on TongaMarek Olšák2015-11-135-47/+113
* radeonsi: rename si_update_gs_ringsMarek Olšák2015-11-131-2/+2
* radeonsi: calculate ESGS_RING_ITEMSIZE in create_shaderMarek Olšák2015-11-132-1/+3
* radeonsi: move maximum gs stream calculation into create_shaderMarek Olšák2015-11-132-16/+7
* radeonsi: clean up small duplication in si_shader_gsMarek Olšák2015-11-132-6/+8
* gallium/radeon: shorten render_cond variable namesMarek Olšák2015-11-131-1/+1
* gallium/radeon: remove predicate_drawing flagMarek Olšák2015-11-131-1/+1
* gallium/radeon: atomize render condition (SET_PREDICATION)Marek Olšák2015-11-133-0/+3
* gallium/radeon: simplify disabling render condition for u_blitterMarek Olšák2015-11-132-10/+9
* gallium/radeon: inline the r600_rings structureMarek Olšák2015-11-1311-90/+90
* radeonsi: prevent recursion in si_context_gfx_flushMarek Olšák2015-11-132-0/+8
* gallium/radeon: remove the IB flushing flagMarek Olšák2015-11-131-3/+0
* gallium/radeon: move GFX/DMA flushing from add_to_buffer_list to need_cs_spaceMarek Olšák2015-11-131-0/+5
* radeonsi: rename cache flushing flags once moreMarek Olšák2015-11-137-35/+30
* radeonsi: set the DISABLE_WR_CONFIRM flag on CI-VI as wellMarek Olšák2015-11-131-2/+2
* radeonsi: initialize SX_PS_DOWNCONVERT to 0 on StoneyMarek Olšák2015-11-131-0/+3
* radeonsi: add glClearBufferSubData accelerationMarek Olšák2015-11-131-0/+60
* radeonsi: add SI_SAVE_FRAGMENT_STATE blitter flagMarek Olšák2015-11-131-19/+25
* radeonsi: fix a future crash in emit_cb_target_maskMarek Olšák2015-11-131-1/+1
* radeonsi: fix unaligned clear_buffer fallbackMarek Olšák2015-11-131-6/+8
* gallium: add PIPE_CAP_CLEAR_TEXTURE and clear_texture prototypeIlia Mirkin2015-11-111-0/+1
* radeonsi: add register definitions for StoneyMarek Olšák2015-11-071-0/+322
* radeonsi: add workarounds for CP DMA to stay on the fast pathMarek Olšák2015-11-071-5/+88
* radeonsi: unify CP DMA preparation logicMarek Olšák2015-11-071-37/+34
* radeonsi: unify CP DMA code determining various flagsMarek Olšák2015-11-071-28/+23
* radeonsi: only enable write confirmation on the last CP DMA packetMarek Olšák2015-11-071-2/+4
* gallium: add PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATSMarek Olšák2015-10-281-0/+1
* radeonsi: allow copying between compatible compressed and uncompressed formatsMarek Olšák2015-10-281-1/+1
* radeonsi: properly check if DCC is enabled and allocatedMarek Olšák2015-10-274-7/+7
* radeonsi: simplify DCC handling in si_initialize_color_surfaceMarek Olšák2015-10-271-7/+3
* radeonsi: Implement DCC fast clear.Bas Nieuwenhuizen2015-10-242-3/+4
* radeonsi: add Stoney to si_init_gs_info()Alex Deucher2015-10-231-0/+1
* radeonsi: Enable DCC.Bas Nieuwenhuizen2015-10-243-6/+46
* radeonsi: Add FLUSH_AND_INV_CB_DATA_TS for DCC.Bas Nieuwenhuizen2015-10-241-0/+11
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