summaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers/radeonsi
Commit message (Collapse)AuthorAgeFilesLines
* radeonsi: remove init config from statesMarek Olšák2015-01-076-5/+4
| | | | | | It really doesn't do anything there. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: reduce the size of si_pm4_stateMarek Olšák2015-01-072-12/+3
| | | | | | | | - the relocs array is unused, remove it - ndw is at most 115 (init), set 140 as the maximum - compute needs 4 buffers per state, graphics only needs 1; set 4 as the maximum Reviewed-by: Michel Dänzer <[email protected]>
* radeon/llvm: Use amdgcn triple for SI+ on LLVM >= 3.6Tom Stellard2015-01-061-2/+7
|
* radeonsi: Cache LLVMTargetMachine object in si_screenTom Stellard2015-01-063-1/+21
| | | | | | | | | | Rather than building a new one every compile. This should reduce some of the overhead of compiling shaders. One consequence of this change is that we lose the MachineInstrs dumps when dumping the shaders via R600_DEBUG. The LLVM IR and assembly is still dumped, and if you still want to see the MachineInstr dump, you can run the dumped LLVM IR through llc.
* radeonsi: fix warningsMarek Olšák2015-01-011-1/+1
|
* radeonsi: Don't modify PA_SC_RASTER_CONFIG register value if rb_mask == 0Michel Dänzer2014-12-251-2/+4
| | | | | | | | | | | E.g. this could happen on older kernels which don't support the RADEON_INFO_SI_BACKEND_ENABLED_MASK query yet. The code in si_write_harvested_raster_configs() doesn't deal with this correctly and would probably mangle the value badly. Cc: "10.4 10.3" <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: force NaNs to 0Marek Olšák2014-12-211-4/+8
| | | | | | | | | This fixes incorrect rendering in Unreal Engine demos. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83510 Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* gallium: add TGSI_SEMANTIC_VERTEXID_NOBASE and TGSI_SEMANTIC_BASEVERTEXRoland Scheidegger2014-12-161-0/+1
| | | | | | | | | | | | | | | | | | | Plus a new PIPE_CAP_VERTEXID_NOBASE query. The idea is that drivers not supporting vertex ids with base vertex offset applied (so, only support d3d10-style vertex ids) will get such a d3d10-style vertex id instead - with the caveat they'll also need to handle the basevertex system value too (this follows what core mesa already does). Additionally, this is also useful for other state trackers (for instance llvmpipe / draw right now implement the d3d10 behavior on purpose, but with different semantics it can just do both). Doesn't do anything yet. And fix up the docs wrt similar values. v2: incorporate feedback from Brian and others, better names, better docs. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium: Remove Android files from distribution.Matt Turner2014-12-121-2/+0
| | | | Android builds Mesa from git, so there don't need to be in the tarball.
* radeonsi: take into account NULL colorbuffers when computing CB_TARGET_MASKMarek Olšák2014-12-101-4/+12
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: only emit line stippling and provoking vertex state when it changesMarek Olšák2014-12-105-0/+9
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: fix SPI state dependency on sprite_coord_enableMarek Olšák2014-12-102-2/+4
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: fix line stippling and provoking vertex state for GS primitivesMarek Olšák2014-12-101-1/+3
| | | | | | I'm not sure if GS hw outputs line lists or line strips. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: emit DRAW_PREAMBLE only if it changesMarek Olšák2014-12-103-8/+17
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: remove setting of VGT_DISPATCH_DRAW_INDEXMarek Olšák2014-12-101-3/+0
| | | | | | | It's used only if VGT_SHADER_STAGES_EN.DISPATCH_DRAW_EN is 1, which we don't set. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: emit GS_OUT_PRIM_TYPE only if it changesMarek Olšák2014-12-103-1/+6
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: emit primitive restart only if it changesMarek Olšák2014-12-103-5/+22
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: emit base vertex and start instance only if they changeMarek Olšák2014-12-103-3/+38
| | | | | | v2: added a helper function for invalidation of the sh constants Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: emit clip registers only if VS, GS, or rasterizer is changedMarek Olšák2014-12-105-32/+39
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: get info about VS outputs from tgsi_shader_infoMarek Olšák2014-12-103-35/+34
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: move all shader-related functions to a new file si_state_shaders.cMarek Olšák2014-12-106-785/+810
| | | | | | This huge amount of code deserves its own file. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: generate derived and draw-related registers directly in the CSMarek Olšák2014-12-103-75/+76
| | | | | | The big function is split into 3 smaller functions. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: si_conv_pipe_prim shouldn't failMarek Olšák2014-12-101-11/+3
| | | | | | An assertion should suffice. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: remove useless variable si_context::pm4_dirty_cdwordsMarek Olšák2014-12-103-11/+1
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: remove unused draw packet functionsMarek Olšák2014-12-102-87/+0
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: emit draw packets directly into the CSMarek Olšák2014-12-103-68/+95
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi/compute: Clamp COMPUTE_TMPRING_SIZE.WAVES to: num_cu * 32Tom Stellard2014-12-081-0/+3
| | | | This is the maximum value allowed for this field.
* radeonsi: Program RASTER_CONFIG for harvested GPUs v5Tom Stellard2014-12-082-6/+130
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Harvested GPUs have some of their render backends disabled, so in order to prevent the hardware from trying to render things with these disabled backends we need to correctly program the PA_SC_RASTER_CONFIG register. v2: - Write RASTER_CONFIG for all SEs. v3: - Set GRBM_GFX_INDEX.INSTANCE_BROADCAST_WRITES bit. - Set GRBM_GFX_INFEX.SH_BROADCAST_WRITES bit when done setting PA_SC_RASTER_CONFIG. - Get num_se and num_sh_per_se from kernel. v4: - Get correct value for num_se - Remove loop for setting PA_SC_RASTER_CONFIG - Only compute raster config when a backend has been disabled. v5: Michel Dänzer - Fix computation for chips with multiple SEs https://bugs.freedesktop.org/show_bug.cgi?id=60879 CC: "10.4 10.3" <[email protected]>
* radeonsi: use minnum and maxnum LLVM intrinsics for MIN and MAX opcodesMarek Olšák2014-11-211-0/+7
| | | | | | | So far it has been compiled into pretty ugly code (8 instructions or so for either opcode). Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: remove unused variable si_state_dsa::db_render_controlMarek Olšák2014-11-191-1/+0
|
* radeonsi: support gl_FragCoord at integer pixel centerMarek Olšák2014-11-182-1/+5
| | | | | | No known benefit for OpenGL, but it doesn't hurt. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: support per-sample gl_FragCoordMarek Olšák2014-11-181-12/+13
| | | | | Cc: 10.4 <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: Disable asynchronous DMA except for PIPE_BUFFERMichel Dänzer2014-11-171-0/+15
| | | | | | | | | | | | | | | | | Using the asynchronous DMA engine for multi-dimensional operations seems to cause random GPU lockups for various people. While the root cause for this might need to be fixed in the kernel, let's disable it for now. Before re-enabling this, please make sure you can hit all newly enabled paths in your testing, preferably with both piglit and real world apps, and get in touch with people on the bug reports below for stability testing. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85647 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83500 Cc: "10.3 10.4" <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Grigori Goronzy <[email protected]>
* radeonsi: implement TGSI_PROPERTY_VS_WINDOW_SPACE_POSITIONMarek Olšák2014-11-163-3/+16
| | | | | | | Required by Nine. Reviewed-by: Michel Dänzer <[email protected]> Tested-by: Nick Sarnie <[email protected]>
* radeonsi/compute: Enable PIPE_SHADER_IR_NATIVE for compute shaders v2Tom Stellard2014-10-314-59/+127
| | | | | | v2: - Drop dependency on LLVM >= 3.5.1 - Rename si_create_shader() to si_shader_binary_read()
* radeonsi: fix incorrect index buffer max size for lowered 8-bit indicesMarek Olšák2014-10-281-1/+1
| | | | | Cc: 10.2 10.3 [email protected] Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: fix polygon mode for points and lines and point/line fill modesMarek Olšák2014-10-281-3/+3
| | | | | | | Fixes piglit/polygon-mode-offset. Cc: 10.2 10.3 [email protected] Reviewed-by: Michel Dänzer <[email protected]>
* gallium: introduce PIPE_CAP_CLIP_HALFZ.Mathias Fröhlich2014-10-241-0/+1
| | | | | | | | | | | | In preparation of ARB_clip_control. Let the driver decide if it supports pipe_rasterizer_state::clip_halfz being set to true. v3: Initially enable on ilo. Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Froehlich <[email protected]
* radeonsi: implement pipe_rasterizer_state::clip_halfzMarek Olšák2014-10-221-0/+1
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: add some missing register definitionsMarek Olšák2014-10-211-0/+23
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: load ring resource descriptors only onceMarek Olšák2014-10-211-35/+42
| | | | | | v2: document the new functions Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: clarify shader constant load functionsMarek Olšák2014-10-211-40/+46
| | | | | | | | | | I'll need indexed loads without the meta data flag for tessellation later. Also rename load_const to buffer_load_const to distinguish it from indexed const loads. v2: add comments Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: statically declare resource and sampler arraysMarek Olšák2014-10-211-8/+2
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: remove conversion of DX9 FACE input to GLMarek Olšák2014-10-211-14/+1
| | | | | | st/mesa and gallium expect the DX9 format, so this is useless. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: revert hack for random failures in glsl-max-varyingsMarek Olšák2014-10-211-7/+1
| | | | | | | | This reverts commit 032e5548b3d4b5efa52359218725cb8e31b622ad. I've run glsl-max-varyings 30 times and it always passed. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: generate shader pm4 states right after shader compilationMarek Olšák2014-10-213-17/+24
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: make pm4 state generation for shaders independent of the contextMarek Olšák2014-10-211-17/+9
| | | | | | | The si_pm4_delete_state calls became useless, because the pm4 state is always generated only once. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: inline si_pm4_alloc_stateMarek Olšák2014-10-214-23/+17
| | | | | | | It seemed like the function needed a context pointer. Let's remove it to make it less confusing. Reviewed-by: Michel Dänzer <[email protected]>
* gallium: add PIPE_SHADER_CAP_MAX_OUTPUTS and use it in st/mesaMarek Olšák2014-10-211-0/+2
| | | | | | | | With 5 shader stages and various combinations of enabled and disabled shaders, the maximum number of outputs in one shader doesn't have to be equal to the maximum number of inputs in the following shader. v2: return 32 for softpipe and llvmpipe
* automake: explicitly set TARGET_RADEON_{WINSYS,COMMON}Emil Velikov2014-10-141-2/+2
| | | | | | | | | | Originally the variables were set only once via the ?= operator but that causes issues when doing incremental builds. They appear to be undefined and missing from the dependency list despite their addition to LIBADD. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84807 Signed-off-by: Emil Velikov <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-15 14:42:59 +0000