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path: root/src/gallium/drivers/radeonsi
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* radeonsi: remove chip_class parameter from si_lower_nirMarek Olšák2018-03-084-10/+6
* radeonsi: expand constbuf 0 address correctly to fix Vega10 hangsMarek Olšák2018-03-081-4/+17
* radeonsi: align command buffer starting address to fix some Raven hangsMarek Olšák2018-03-081-2/+3
* ac/radeonsi: add emit_kill to the abiTimothy Arceri2018-03-081-0/+1
* radeonsi: add si_llvm_emit_kill() helperTimothy Arceri2018-03-082-12/+21
* radeonsi: make use of if/loop build helpers in acTimothy Arceri2018-03-082-160/+11
* radeonsi: remove si_llvm_add_attributeMarek Olšák2018-03-073-25/+16
* radeonsi: fix passing address32_hi to LLVM for high valuesMarek Olšák2018-03-071-2/+5
* radeonsi: add/update assertions for 32-bit address spaceMarek Olšák2018-03-071-1/+5
* radeonsi: prevent a negative buffer offset in si_upload_descriptorsMarek Olšák2018-03-071-4/+3
* radeonsi: properly extract a buffer address from a descriptorMarek Olšák2018-03-071-1/+7
* radeonsi: fix vertex buffer address computation with full 64-bit addressesMarek Olšák2018-03-071-3/+3
* radeonsi: mask out high VM address bits in registers where neededMarek Olšák2018-03-073-22/+24
* ac: add ac_count_scratch_private_memory()Samuel Pitoiset2018-03-061-28/+4
* radeonsi/nir: fix handling of doubles for gs inputsTimothy Arceri2018-03-061-2/+6
* radeonsi: move si_nir_load_input_gs() to si_shader.cTimothy Arceri2018-03-063-29/+20
* ac: add ac_build_fsign()Samuel Pitoiset2018-03-051-11/+4
* ac: add ac_build_isign()Samuel Pitoiset2018-03-051-8/+2
* ac: add ac_build_fract()Samuel Pitoiset2018-03-051-8/+5
* radeonsi/nir: call ac_lower_indirect_derefs()Timothy Arceri2018-03-054-4/+6
* radeonsi: add chip class to compiler_ctx_stateTimothy Arceri2018-03-053-0/+4
* radeonsi: fix radeon create encoder returnBoyuan Zhang2018-03-021-1/+1
* radeonsi/nir: increase values to 8 for gs fetch.Dave Airlie2018-03-011-1/+1
* radeonsi: set some context vars for nir pathTimothy Arceri2018-03-011-6/+10
* ac/radeonsi: add load_base_vertex() to the abiTimothy Arceri2018-02-281-0/+1
* radeonsi: create get_base_vertex() helperTimothy Arceri2018-02-281-14/+20
* radeonsi/nir: disable vertex_id_zero_based loweringTimothy Arceri2018-02-281-1/+0
* radeonsi: remove 2 unused user SGPRs from merged TES-GS with 32-bit pointersMarek Olšák2018-02-264-11/+35
* radeonsi: make SI_SGPR_VERTEX_BUFFERS the last user SGPR inputMarek Olšák2018-02-264-20/+53
* radeonsi: set correct num_input_sgprs for VS prolog in merged shadersMarek Olšák2018-02-261-24/+24
* radeonsi: allow fewer input SGPRs in 2nd shader of merged shadersMarek Olšák2018-02-261-1/+5
* radeonsi: don't use struct si_descriptors for vertex buffer descriptorsMarek Olšák2018-02-266-33/+46
* radeonsi/nir: enable lowering of fpowTimothy Arceri2018-02-261-0/+1
* radeonsi/nir: fix loading of doubles for tess varyingsTimothy Arceri2018-02-261-2/+10
* radeonsi/nir: fix lds store in tcs outputs handlingTimothy Arceri2018-02-261-1/+1
* radeonsi: remove si_descriptors parameter from emit_shader_pointer functionsMarek Olšák2018-02-241-12/+13
* radeonsi: preload the tess offchip ring in TESMarek Olšák2018-02-242-12/+10
* radeonsi: move tess ring address into TCS_OUT_LAYOUT, removes 2 TCS user SGPRsMarek Olšák2018-02-245-91/+70
* radeonsi: move 2nd-shader descriptor pointers into s[0:1]Marek Olšák2018-02-243-74/+140
* radeonsi: change si_descriptors::shader_userdata_offset type to shortMarek Olšák2018-02-242-9/+9
* radeonsi: put both tessellation rings into 1 bufferMarek Olšák2018-02-244-29/+18
* radeonsi: move tessellation ring info into si_screenMarek Olšák2018-02-243-45/+52
* radeonsi: move TCS_OUT_LAYOUT.PatchVerticesIn to lower bitsMarek Olšák2018-02-243-5/+6
* radeonsi/nir: collect more accurate output_usagemaskTimothy Arceri2018-02-221-13/+43
* radeonsi/nir: disable GLSL IR loop unrollingTimothy Arceri2018-02-221-0/+2
* radeonsi/nir: fix tess varying loads for doublesTimothy Arceri2018-02-221-2/+2
* ac/radeonsi: pass type to load_tess_varyings()Timothy Arceri2018-02-222-0/+3
* radeonsi: enable uvd encode for HEVC mainJames Zhu2018-02-211-1/+3
* radeonsi:create uvd hevc enc entryJames Zhu2018-02-211-3/+12
* radeonsi: add nir shader cache supportTimothy Arceri2018-02-201-11/+30
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