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* util/u_blitter: implement alpha blending for pipe->blitMarek Olšák2015-08-211-1/+2
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* radeonsi: fix a typo as_es -> as_ls in a stringMarek Olšák2015-08-191-1/+1
| | | | Trivial.
* radeonsi: fix indirect indexing of MSAA texturesMarek Olšák2015-08-191-4/+13
| | | | | | FMASK wasn't handled correctly. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: revert a wrong DB bug workaround for VIMarek Olšák2015-08-141-4/+0
| | | | | | | The bug was misunderstood. Besides that, the bug affects a DB feature we don't use yet. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: add support for FIJI (v4)Alex Deucher2015-08-141-0/+5
| | | | | | | | | | | | v2: incorporate comments from Marek v3: add missing fiji case in winsys init use tonga raster config (double check this) v4: rebase on harvest patch Reviewed-by: Marek Olšák <[email protected]> (v3) Reviewed-by: Christian König <[email protected]> (v3) Reviewed-by: David Zhang <[email protected]> (v3) Signed-off-by: Alex Deucher <[email protected]>
* radeonsi: add harvest support for CI/VI parts (v3)Alex Deucher2015-08-141-92/+116
| | | | | | | | | | | | | Properly calculate the PA_SC_RASTER_CONFIG[_1] settings for harvest chips. v2: - fix default raster config settings for CZ and KV - Suggestions from Michel v3: - handle multiple packers properly for CI+ - GRBM_GFX_INDEX is privileged on VI+ Reviewed-by: Michel Dänzer <[email protected]> (v2) Signed-off-by: Alex Deucher <[email protected]>
* radeonsi: properly handler raster_config setup on CZAlex Deucher2015-08-141-1/+1
| | | | | | | Need to take into account the number of RBs. Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* radeonsi: properly set the raster_config for KVAlex Deucher2015-08-141-5/+9
| | | | | | | | | This enables the second RB on asics that support it which should boost performance. Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
* radeonsi: add amdgpu support for querying the GPU reset stateMarek Olšák2015-08-141-1/+14
| | | | Reviewed-by: Christian König <[email protected]>
* radeonsi: add VI hardware supportMarek Olšák2015-08-146-25/+114
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* radeonsi: add definitions for VI status registersMarek Olšák2015-08-141-1/+1079
| | | | | | | | Useful for debugging hangs with the read-register interface. I checked that this adds the same register fields as the kernel driver. Acked-by: Michel Dänzer <[email protected]> Acked-by: Christian König <[email protected]>
* radeonsi: add VI register definitionsMarek Olšák2015-08-142-61/+1041
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* radeonsi: fix DRM version checks for amdgpu DRM 3.0.0Marek Olšák2015-08-142-5/+7
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* winsys/amdgpu: add a new winsys for the new kernel driverMarek Olšák2015-08-141-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v2: - lots of changes according to Emil Velikov's comments - implemented radeon_winsys::read_registers v3: - a lot of new work, many of them adapt to libdrm interface changes Squashed patches: winsys/amdgpu: implement radeon_winsys context support winsys/amdgpu: add reference counting for contexts winsys/amdgpu: add userptr support winsys/amdgpu: allocate IBs like normal buffers winsys/amdgpu: add IBs to the buffer list, adapt to interface changes winsys/amdgpu: don't use KMS handles as reloc hash keys winsys/amdgpu: sync buffer accesses to different rings winsys/amdgpu: use dependencies instead of waiting for last fence v2 gallium/radeon: unify buffer_wait and buffer_is_busy in the winsys interface (amdgpu part) winsys/amdgpu: track fences per ring and be thread-safe winsys/amdgpu: simplify waiting on a variable in amdgpu_fence_wait gallium/radeon: allow the winsys to choose the IB size (amdgpu part) winsys/amdgpu: switch to new amdgpu_cs_query_fence_status interface winsys/amdgpu: handle fence and dependencies merge winsys/amdgpu follow libdrm change to move user fence into UMD winsys/amdgpu: use amdgpu_bo_va_op for va map/unmap v2 winsys/amdgpu: use the new tiling flags winsys/amdgpu: switch to new GTT_USWC definition winsys/amdgpu: expose amdgpu_cs_query_reset_state to drivers winsys/amdgpu: fix valgrind warnings winsys/amdgpu: don't use VRAM with APUs that don't have much of it winsys/amdgpu: require LLVM 3.6.1 for VI because of bug fixes there winsys/amdgpu: remove amdgpu_winsys::num_cpus winsys/amdgpu: align BO size to page size winsys/amdgpu: reduce BO cache timeout winsys/amdgpu: remove useless flushing and waiting in amdgpu_bo_set_tiling winsys/amdgpu: use amdgpu_device_handle as a unique device ID instead of fd winsys/amdgpu: use safer access to amdgpu_fence_wait::signalled winsys/amdgpu: allow maximum IB size of 4 MB winsys/amdgpu: add ip_instance into amdgpu_fence gallium/radeon: add RING_COMPUTE instead of RADEON_FLUSH_COMPUTE winsys/amdgpu: set the ring type at CS initilization winsys/amdgpu: query the GART page size from the kernel winsys/amdgpu: correctly wait for shared buffers to become idle winsys/amdgpu: set the amdgpu_cs_fence structure only once at fence creation winsys/amdgpu: add a specific error message for cs_submit -> -ENOMEM winsys/amdgpu: check num_active_ioctls before calling amdgpu_bo_wait_for_idle winsys/amdgpu: clear user fence BO after allocating it winsys/amdgpu: fix user fences winsys/amdgpu: make amdgpu_winsys_create public winsys/amdgpu: remove thread offloading winsys/amdgpu: flatten the amdgpu_cs_context structure and simplify more v4: require libdrm 2.4.63
* radeonsi: add support for EXT_depth_bounds_testMarek Olšák2015-08-142-5/+7
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* gallium: add an interface for EXT_depth_bounds_testMarek Olšák2015-08-141-0/+1
| | | | | Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* gallium: add support for GLES texture float extensions (v3)Marek Olšák2015-08-141-0/+2
| | | | | | | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74329 v2: add a CAP for half floats drivers should not expose the CAPs if they don't support the formats v3: update relnotes Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* radeonsi: fix polygon offset scaleMarek Olšák2015-08-131-1/+1
| | | | | | | | | | The value was copied from r300g, which uses 1/12 subpixels, but this hw uses 1/16 subpixels. Fixes piglit: gl-1.4-polygon-offset (formerly a glean test) Reviewed-by: Michel Dänzer <[email protected]> Cc: [email protected]
* radeonsi: enable VS_OUT_MISC_SIDE_BUS_ENAMarek Olšák2015-08-131-0/+1
| | | | | | | This is recommended for better performance. Diag tests always enable this. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: add support for gl_PrimitiveID in the fragment shaderMarek Olšák2015-08-134-9/+49
| | | | | | | | | | It must be obtained from the VS. The GS scenario A must be enabled for PrimID to be generated for the VS. + 4 piglits Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: move VGT_GS_MODE to the VS stateMarek Olšák2015-08-131-2/+6
| | | | | | The VS will want to select GS scenario A here (VS with PrimitiveID). Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: use helper functions to mark atoms dirtyGrazvydas Ignotas2015-08-118-32/+47
| | | | | | | | | | This is analogous to r300_mark_atom_dirty() used by r300, and will be used by later patches. For common radeon code, appropriate helper is called through a function pointer. No functional changes. Signed-off-by: Marek Olšák <[email protected]>
* winsys/radeon: add an interface for contextsMarek Olšák2015-08-071-1/+1
| | | | | | | | | | | | | Same idea as in libdrm_amdgpu. A command stream can only be created for a specific context and it's always submitted to that context. This will mainly be used by amdgpu and it's required by the GPU reset status query too. (radeon only has a basic version of the query and thus doesn't need this) Reviewed-by: Christian König <[email protected]>
* radeonsi: rename enable_s3tc -> enable_compressed_formatsMarek Olšák2015-08-061-5/+4
| | | | Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: always flush framebuffer caches at the beginning of IBsMarek Olšák2015-08-061-1/+2
| | | | | | | better safe than sorry Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeonsi: don't count the exact needed CS space if the CS is large enoughMarek Olšák2015-08-061-2/+11
| | | | Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: don't crash when cleaning up after an incomplete contextMarek Olšák2015-08-061-7/+11
| | | | Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: add a HUD query showing the number of shaders createdMarek Olšák2015-08-061-0/+1
| | | | | Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: add a HUD query showing the number of compiler invocationsMarek Olšák2015-08-061-0/+1
| | | | | Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: before storing tess levels, load them from LDS instead of temporaryMarek Olšák2015-08-061-79/+57
| | | | | | | | | Also use only one store if stride <= 4. All the fetches from and stores to temporaries can be removed now. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91461 Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: allow the winsys to choose the IB sizeMarek Olšák2015-08-061-1/+1
| | | | | | | Picked from the amdgpu branch. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: suspend timer queries between IBsMarek Olšák2015-08-061-1/+2
| | | | | | | When we are measuring the time spent in a draw call, an unexpected flush can distort the result. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: flush if the memory usage for an IB is too highMarek Olšák2015-08-022-0/+17
| | | | | | | Picked from the amdgpu branch. Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeonsi: copy *8_SNORM bits exactly in resource_copy_regionMarek Olšák2015-07-311-1/+3
| | | | | | | | | | Disabling the FP16 mode didn't help. If needed, we can use this trick for blits too, but not for scaled blits. + 4 piglits Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: early exit in si_clear if there's nothing to doMarek Olšák2015-07-311-0/+2
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: fix a regression since the resource_copy_region cleanupMarek Olšák2015-07-311-1/+1
| | | | | | | | | Broken since: 46b2b3b - radeonsi: don't change pipe_resource in resource_copy_region Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91444 Reviewed-and-Tested-by: Michel Dänzer <[email protected]>
* radeonsi: fix broken st/nine from merging tessellationMarek Olšák2015-07-311-2/+7
| | | | st/nine uses GENERIC slots greater than 60.
* radeonsi: move CP DMA functions to their own fileMarek Olšák2015-07-316-236/+274
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: add a debug flag that disables printing ISA in shader dumpsMarek Olšák2015-07-311-9/+11
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* radeonsi: add a debug flag that disables printing TGSI in shader dumpsMarek Olšák2015-07-311-1/+1
| | | | Reviewed-by: Dave Airlie <[email protected]>
* radeonsi: add a debug flag that disables printing the LLVM IR in shader dumpsMarek Olšák2015-07-311-6/+7
| | | | This is for shader-db and should reduce size of shader dumps.
* radeonsi: store shader disassemblies in memory for future usersMarek Olšák2015-07-312-3/+8
| | | | | This will be used by the new ddebug pipe. I'm including it now to avoid conflicts with other patches.
* gallium/radeon: remove build_intrinsic and build_tgsi_intrinsicMarek Olšák2015-07-311-28/+28
| | | | | | duplicated now Reviewed-by: Dave Airlie <[email protected]>
* gallivm: add LLVMAttribute parameter to lp_build_intrinsicMarek Olšák2015-07-311-8/+8
| | | | | | This will help remove some duplicated code from radeon. Reviewed-by: Dave Airlie <[email protected]>
* radeonsi: completely rework updating descriptors without CP DMAMarek Olšák2015-07-314-271/+128
| | | | | | | | | | | | | | | | | | | | The patch has a better explanation. Just a summary here: - The CPU always uploads a whole descriptor array to previously-unused memory. - CP DMA isn't used. - No caches need to be flushed. - All descriptors are always up-to-date in memory even after a hang, because CP DMA doesn't serve as a middle man to update them. This should bring: - better hang recovery (descriptors are always up-to-date) - better GPU performance (no KCACHE and TC flushes) - worse CPU performance for partial updates (only whole arrays are uploaded) - less used IB space (no CP_DMA and WRITE_DATA packets) - simpler code - hopefully, some of the corruption issues with SI cards will go away. If not, we'll know the issue is not here. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: enable GL4.1 and update documentation (v2)Dave Airlie2015-07-301-1/+1
| | | | | | | | | | This enables GL4.1 for radeonsi, and updates the docs in the correct places. v2: enable only for llvm 3.7 which has fixes in place. Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi: add GS multiple streams support (v2)Dave Airlie2015-07-306-39/+127
| | | | | | | | | | | | | | | | | | | | | | | | | | This is the final piece for ARB_gpu_shader5, The code is based on the r600 code from Glenn Kennard, and myself. While developing this, I'm not 100% sure of all the calculations made in the GS registers, this is why the max_stream is worked out there and used to limit the changes in registers. Otherwise my initial attempts either regressed GS texelFetch tests or primitive-id-restart. The current code has no regressions in piglit. This commit doesn't enable ARB_gpu_shader5, since that just bumps the glsl level to 4.00, so I'll just do a separate patch for 4.10. v1.1: fix bug introduced in rebase. v2: Address Marek's review comments, remove my llvm stream code for simpler C, move gsvs_ring and gs_next_vertex to arrays. Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeon: add support for streams to the common streamout code. (v2)Dave Airlie2015-07-291-3/+15
| | | | | | | | | | | | This adds to the common radeon streamout code, support for multiple streams. It updates radeonsi/r600 to set the enabled mask up. v2: update for changes in previous patch. Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600,radeonsi: GL_ARB_conditional_render_invertedEdward O'Callaghan2015-07-291-1/+1
| | | | | | | | | | By using 'Tobias Klausmann' piglit test-suite patch. We obtain a full 12/12 passes using this patch. By 'faking' to claim support for this extension we obtain 7 fails and 5 passes. Signed-off-by: Edward O'Callaghan <[email protected]> Tested-by: Furkan Alaca <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* radeonsi: add support for interpolateAt functions (v2)Dave Airlie2015-07-281-1/+240
| | | | | | | | | | | This is part of ARB_gpu_shader5, and this passes all the piglit tests currently available. v2: use macros from the fine derivs commit. add comments. Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
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