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* radeonsi: Program RASTER_CONFIG for harvested GPUs v5Tom Stellard2014-12-112-6/+130
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Harvested GPUs have some of their render backends disabled, so in order to prevent the hardware from trying to render things with these disabled backends we need to correctly program the PA_SC_RASTER_CONFIG register. v2: - Write RASTER_CONFIG for all SEs. v3: - Set GRBM_GFX_INDEX.INSTANCE_BROADCAST_WRITES bit. - Set GRBM_GFX_INFEX.SH_BROADCAST_WRITES bit when done setting PA_SC_RASTER_CONFIG. - Get num_se and num_sh_per_se from kernel. v4: - Get correct value for num_se - Remove loop for setting PA_SC_RASTER_CONFIG - Only compute raster config when a backend has been disabled. v5: Michel Dänzer - Fix computation for chips with multiple SEs https://bugs.freedesktop.org/show_bug.cgi?id=60879 CC: "10.4 10.3" <[email protected]> (cherry picked from commit 67dcbcd92cb9877a04747d6cf7fef14c2b8af8b3)
* radeonsi: support per-sample gl_FragCoordMarek Olšák2014-11-191-12/+13
| | | | | | Cc: 10.4 <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> (cherry picked from commit da2dea384374c70098a3aa74f42fda6381556945)
* radeonsi: Disable asynchronous DMA except for PIPE_BUFFERMichel Dänzer2014-11-191-0/+15
| | | | | | | | | | | | | | | | | | Using the asynchronous DMA engine for multi-dimensional operations seems to cause random GPU lockups for various people. While the root cause for this might need to be fixed in the kernel, let's disable it for now. Before re-enabling this, please make sure you can hit all newly enabled paths in your testing, preferably with both piglit and real world apps, and get in touch with people on the bug reports below for stability testing. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85647 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83500 Cc: "10.3 10.4" <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Grigori Goronzy <[email protected]> (cherry picked from commit ae4536b4f71cbe76230ea7edc7eb4d6041e651b4)
* radeonsi/compute: Enable PIPE_SHADER_IR_NATIVE for compute shaders v2Tom Stellard2014-10-314-59/+127
| | | | | | v2: - Drop dependency on LLVM >= 3.5.1 - Rename si_create_shader() to si_shader_binary_read()
* radeonsi: fix incorrect index buffer max size for lowered 8-bit indicesMarek Olšák2014-10-281-1/+1
| | | | | Cc: 10.2 10.3 [email protected] Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: fix polygon mode for points and lines and point/line fill modesMarek Olšák2014-10-281-3/+3
| | | | | | | Fixes piglit/polygon-mode-offset. Cc: 10.2 10.3 [email protected] Reviewed-by: Michel Dänzer <[email protected]>
* gallium: introduce PIPE_CAP_CLIP_HALFZ.Mathias Fröhlich2014-10-241-0/+1
| | | | | | | | | | | | In preparation of ARB_clip_control. Let the driver decide if it supports pipe_rasterizer_state::clip_halfz being set to true. v3: Initially enable on ilo. Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Froehlich <[email protected]
* radeonsi: implement pipe_rasterizer_state::clip_halfzMarek Olšák2014-10-221-0/+1
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: add some missing register definitionsMarek Olšák2014-10-211-0/+23
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: load ring resource descriptors only onceMarek Olšák2014-10-211-35/+42
| | | | | | v2: document the new functions Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: clarify shader constant load functionsMarek Olšák2014-10-211-40/+46
| | | | | | | | | | I'll need indexed loads without the meta data flag for tessellation later. Also rename load_const to buffer_load_const to distinguish it from indexed const loads. v2: add comments Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: statically declare resource and sampler arraysMarek Olšák2014-10-211-8/+2
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: remove conversion of DX9 FACE input to GLMarek Olšák2014-10-211-14/+1
| | | | | | st/mesa and gallium expect the DX9 format, so this is useless. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: revert hack for random failures in glsl-max-varyingsMarek Olšák2014-10-211-7/+1
| | | | | | | | This reverts commit 032e5548b3d4b5efa52359218725cb8e31b622ad. I've run glsl-max-varyings 30 times and it always passed. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: generate shader pm4 states right after shader compilationMarek Olšák2014-10-213-17/+24
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: make pm4 state generation for shaders independent of the contextMarek Olšák2014-10-211-17/+9
| | | | | | | The si_pm4_delete_state calls became useless, because the pm4 state is always generated only once. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: inline si_pm4_alloc_stateMarek Olšák2014-10-214-23/+17
| | | | | | | It seemed like the function needed a context pointer. Let's remove it to make it less confusing. Reviewed-by: Michel Dänzer <[email protected]>
* gallium: add PIPE_SHADER_CAP_MAX_OUTPUTS and use it in st/mesaMarek Olšák2014-10-211-0/+2
| | | | | | | | With 5 shader stages and various combinations of enabled and disabled shaders, the maximum number of outputs in one shader doesn't have to be equal to the maximum number of inputs in the following shader. v2: return 32 for softpipe and llvmpipe
* automake: explicitly set TARGET_RADEON_{WINSYS,COMMON}Emil Velikov2014-10-141-2/+2
| | | | | | | | | | Originally the variables were set only once via the ?= operator but that causes issues when doing incremental builds. They appear to be undefined and missing from the dependency list despite their addition to LIBADD. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84807 Signed-off-by: Emil Velikov <[email protected]>
* radeonsi: use tgsi_shader_info in si_llvm_emit_fs_epilogueMarek Olšák2014-10-121-71/+61
| | | | | | | | | This is the last use tgsi_parse_token in radeonsi. It looks ugly because the code was re-indented, but there is really no change in behavior. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: remove si_shader_output_values::indexMarek Olšák2014-10-121-17/+6
| | | | | | | | It's redundant now. It led to a simplification in si_llvm_emit_streamout, because outidx == reg. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: use tgsi_shader_info in si_llvm_emit_vs_epilogueMarek Olšák2014-10-121-26/+13
| | | | | | That code was really ugly. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: remove shader->input[] and output[] arrays and dependenciesMarek Olšák2014-10-122-88/+0
| | | | | | | | | They were reinventing tgsi_shader_info. They are unused now. radeon_llvm_context::load_input can be NULL if input fetching is implemented in some other way. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: move param_offset out of shader->input[] and output[]Marek Olšák2014-10-123-7/+10
| | | | | | Those are going away. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: use tgsi_shader_info to get a list of GS outputsMarek Olšák2014-10-122-14/+12
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: use tgsi_shader_info in si_update_spi_mapMarek Olšák2014-10-121-9/+13
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: simplify dereferences in si_update_spi_mapMarek Olšák2014-10-121-2/+2
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: use tgsi_shader_info in si_shader_vsMarek Olšák2014-10-121-2/+3
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: use tgsi_shader_info in si_shader_psMarek Olšák2014-10-123-5/+5
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: use tgsi_shader_info in fetch_input_gsMarek Olšák2014-10-121-4/+5
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: don't rely on shader->output in si_llvm_emit_fs_epilogueMarek Olšák2014-10-121-1/+1
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: use tgsi_shader_info in si_llvm_emit_es_epilogueMarek Olšák2014-10-121-17/+5
| | | | | | tgsi_shader_info contains everything we need. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: don't recompile shaders when changing nr_cbufs from 0 to 1Marek Olšák2014-10-123-4/+4
| | | | | | Both cases are equivalent. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: remove vs.ucps_enabled from the shader keyMarek Olšák2014-10-123-15/+0
| | | | | | Written CLIPDIST outputs are simply disabled in PA_CL_VS_OUT_CNTL. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: assume ClipDistance usage mask is always 0xfMarek Olšák2014-10-122-8/+2
| | | | | | | | | | | | No code in Mesa sets the usage mask to any other value. The final mask is AND'ed with enable bits from the rasterizer state anyway. If somebody implements setting usage masks in st/mesa, we can use tgsi_shader_info to get it more easily. This is a prerequisite for the following commit. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: Use dummy pixel shader if compilation of the real shader failedMichel Dänzer2014-10-073-7/+22
| | | | | | | Instead of crashing. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79155#c5 Reviewed-by: Marek Olšák <[email protected]>
* tgsi: change tgsi_shader_info::properties to a one-dimensional arrayMarek Olšák2014-10-042-5/+5
| | | | | | Reviewed-by: Roland Scheidegger <[email protected]> v2: fix svga too
* radeonsi: set number of userdata SGPRs of GS copy shader to 4Marek Olšák2014-10-043-10/+23
| | | | | | | It only needs the constant buffer with clip planes and read-write resources for the GS->VS ring and streamout. That's 2 pointers. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: pass the GS shader directly to si_generate_gs_copy_shaderMarek Olšák2014-10-041-3/+3
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: set LLVMByValAttribute for all descriptor arraysMarek Olšák2014-10-041-10/+7
| | | | | | I hope this is correct. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: make the vertex shader key smallerMarek Olšák2014-10-041-1/+2
| | | | | | We only support 16 vertex attribs, not 32. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: don't flush shader caches when building PM4 shader statesMarek Olšák2014-10-041-8/+0
| | | | | | | | | This is a wrong place to flush caches to say the least. I don't think we need to flush the instruction caches if we don't patch shaders with DMA. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: remove interp_at_sample from the key, use TGSI_INTERPOLATE_LOC_SAMPLEMarek Olšák2014-10-043-5/+2
| | | | | | | | | st/mesa has the same flag in its shader key, we don't need to do it in the driver anymore. Instead, use TGSI_INTERPOLATE_LOC_SAMPLE, which is what st/mesa sets. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: move geometry shader properties from si_shader to si_shader_selectorMarek Olšák2014-10-044-29/+38
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: always compile shaders on demandMarek Olšák2014-10-041-13/+3
| | | | | | | The first compiled shader is sometimes useless, because the key doesn't match the key for the draw call where it's used. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: remove unused variable si_shader::gs_input_primMarek Olšák2014-10-042-3/+0
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: get fs_write_all from tgsi_shader_info directlyMarek Olšák2014-10-043-16/+3
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* tgsi: simplify shader properties in tgsi_shader_infoMarek Olšák2014-10-041-36/+17
| | | | Use an array of properties indexed by TGSI_PROPERTY_* definitions.
* radeonsi: get tgsi_shader_info only once before compilationMarek Olšák2014-10-043-21/+16
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: fix CS tracing and remove excessive CS dumpingMarek Olšák2014-10-043-35/+25
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