| Commit message (Collapse) | Author | Age | Files | Lines |
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Based on the corresponding SI support. Same as that, this is currently
only enabled for one-dimensional buffer copies due to issues with
multi-dimensional SDMA copies.
Reviewed-by: Marek Olšák <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
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Softpipe, llvmpipe, r300g, and radeonsi pass tests. Other drivers need testing.
Freedreno and nv30 are definitely broken. Other drivers seem to be alright.
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Reviewed-by: Michel Dänzer <[email protected]>
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Reviewed-by: Michel Dänzer <[email protected]>
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Cc: 10.6 <[email protected]>
Reviewed-by: Michel Dänzer <[email protected]>
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These can't occur between VS and GS, because GS is only supported
in the core profile.
Reviewed-by: Michel Dänzer <[email protected]>
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Reviewed-by: Michel Dänzer <[email protected]>
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Without it, texcoords are mapped to GENERIC[0..7], PointCoord is mapped to
GENERIC[8], and user-defined varyings start from GENERIC[9]. Since texcoords
can only be used between VS and PS, and PointCoord is PS-only, it's silly to
always start from GENERIC[9] in all other shaders (such as LS, HS, ES, GS).
This adds support for TEXCOORD and PCOORD semantics. As a result, st/mesa
will use GENERIC[0] as a base for user-defined varyings, which should make
linking ES and GS as well as tessellation shaders at runtime easier.
Reviewed-by: Michel Dänzer <[email protected]>
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Reviewed-by: Kenneth Graunke <[email protected]>
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Required because of a VI hw bug.
Reviewed-by: Michel Dänzer <[email protected]>
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Reviewed-by: Michel Dänzer <[email protected]>
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Reviewed-by: Michel Dänzer <[email protected]>
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... to manage the LIBDRM*_CFLAGS. The former is the recommended approach
by the Android build system developers while the latter has been
depreciated for quite some time.
Cc: "10.4 10.5" <[email protected]>
Signed-off-by: Emil Velikov <[email protected]>
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Tested-by: Tom Stellard <[email protected]>
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As mentioned by Michel Dänzer for LLVM >= 3.6 we create the
LLVMTargetMachine (with triple amdgcn--), as we setup the radeonsi
context. For older LLVM or hardware (r600) the triple is always r600--
and is created at a later stage - radeon_llvm_compile()
Signed-off-by: Emil Velikov <[email protected]>
Reviewed-by: Michel Dänzer <[email protected]>
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This makes it easier to parse.
Reviewed-by: Marek Olšák <[email protected]>
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types v2
v2:
- Fix typo
Reviewed-by: Marek Olšák <[email protected]>
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Fixes a crash in genymotion with several threads compiling shaders
concurrently.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89746
Cc: 10.5 <[email protected]>
Reviewed-by: Tom Stellard <[email protected]>
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radeon_llvm_emit_prepare_cube_coords uses coords[4] in some cases (TXB2 etc.)
Discovered by Coverity. Reported by Ilia Mirkin.
Cc: 10.5 10.4 <[email protected]>
Reviewed-by: Michel Dänzer <[email protected]>
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This will be used a lot (especially by tessellation).
v2: don't use the bfe intrinsic
Reviewed-by: Tom Stellard <[email protected]>
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- move it to its own function
- do it after all states are emitted
- bump SI_MAX_DRAW_CS_DWORDS
Reviewed-by: Michel Dänzer <[email protected]>
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Reviewed-by: Michel Dänzer <[email protected]>
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Do it only when the line stipple state is changed.
Reviewed-by: Michel Dänzer <[email protected]>
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This requires enabling the optional GL provoking vertex behavior for quads.
+ some cosmetic changes, so that the register is set exactly the same as
on r600.
Reviewed-by: Michel Dänzer <[email protected]>
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Reviewed-by: Michel Dänzer <[email protected]>
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The fragment shader multiplies the alpha channel with gl_SampleMaskIn.
If blending is enabled, it looks like MSAA.
Reviewed-by: Michel Dänzer <[email protected]>
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Sample locations are not updated as often as framebuffers.
Reviewed-by: Michel Dänzer <[email protected]>
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This will be used for line and polygon smoothing.
This is GCN-only even though it's in shared code.
Reviewed-by: Michel Dänzer <[email protected]>
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Reviewed-by: Michel Dänzer <[email protected]>
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Reviewed-by: Michel Dänzer <[email protected]>
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Reviewed-by: Glenn Kennard <[email protected]>
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Reviewed-by: Tom Stellard <[email protected]>
Reviewed-by: Glenn Kennard <[email protected]>
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Reviewed-by: Tom Stellard <[email protected]>
Reviewed-by: Glenn Kennard <[email protected]>
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Needed by ARB_gpu_shader5.
v2: select DMAD for FMA with double precision
v3: add and select DFMA
Reviewed-by: Ilia Mirkin <[email protected]>
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This adds SGPR count, VGPR count, shader size, LDS size, and scratch
usage to shader dumps.
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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v2:
- Simplify ifdef
Reviewed-by: Michel Dänzer <[email protected]>
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- remove the last parameter of si_emit_rasterizer_prim_state
- remove the last unused parameter of si_emit_draw_registers
- use current_rast_prim in si_emit_draw_registers
Reviewed-by: Michel Dänzer <[email protected]>
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Reviewed-by: Michel Dänzer <[email protected]>
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Reviewed-by: Michel Dänzer <[email protected]>
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The copy shader doesn't use any other preloaded VGPRs.
Reviewed-by: Michel Dänzer <[email protected]>
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Reviewed-by: Michel Dänzer <[email protected]>
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0x3F800000 -> fui(1.0)
0x00000000 -> 0
Reviewed-by: Dave Airlie <[email protected]>
Reviewed-by: Michel Dänzer <[email protected]>
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It was probably 0 already, but it doesn't hurt to set it.
Reviewed-by: Michel Dänzer <[email protected]>
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Cc: 10.5 10.4 <[email protected]>
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Broken by a27b74819ad375e8c0bc88e13f42c951d2b5cd6a.
This fix is critical and should be ported to stable ASAP.
Cc: 10.5 10.4 <[email protected]>
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This reverts 73c2b0d18c51459697d8ec194ecfc4438c98c139.
It doesn't seem to be reliable. It's probably missing a wait packet or
something, because it's just a register write and doesn't wait for anything.
SURFACE_SYNC at least seems to wait until the flush is done. Just guessing.
Let's not complicate things and revert this.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88561
Cc: 10.5 <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
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