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path: root/src/gallium/drivers/radeonsi/si_shader.c
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* radeonsi: implement vertex color clamping for tess and GSMarek Olšák2018-06-281-28/+69
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* radeonsi: move VS_STATE_SGPR before draw SGPRsMarek Olšák2018-06-281-7/+7
| | | | for vertex color clamping.
* radeonsi: don't use malloc in si_generate_gs_copy_shaderMarek Olšák2018-06-281-10/+2
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* radeonsi: store compute local_size into tgsi_shader_infoMarek Olšák2018-06-281-1/+2
| | | | This is kinda a hack, but it's enough for the shader cache.
* radeonsi/gfx9: insert the barrier between merged shaders inside the if blockMarek Olšák2018-06-281-5/+13
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* radeonsi: stop using lp_build_emit_llvm_unary/binaryMarek Olšák2018-06-251-9/+8
| | | | Reviewed-by: Timothy Arceri <[email protected]>
* radeonsi: stop using lp_build_allocMarek Olšák2018-06-251-4/+3
| | | | Reviewed-by: Timothy Arceri <[email protected]>
* radeonsi: use gallivm lessMarek Olšák2018-06-251-2/+2
| | | | Reviewed-by: Timothy Arceri <[email protected]>
* radeonsi: stop using lp_bld_intr.hMarek Olšák2018-06-251-16/+18
| | | | Reviewed-by: Timothy Arceri <[email protected]>
* radeonsi: remove last uses of lp_build_context::undefMarek Olšák2018-06-251-6/+6
| | | | Reviewed-by: Timothy Arceri <[email protected]>
* radeonsi: stop using lp_bld_arit.hMarek Olšák2018-06-251-37/+31
| | | | Reviewed-by: Timothy Arceri <[email protected]>
* radeonsi: stop using lp_build_gather_valuesMarek Olšák2018-06-251-23/+22
| | | | Reviewed-by: Timothy Arceri <[email protected]>
* radeonsi: clean up some #includesMarek Olšák2018-06-251-5/+1
| | | | Reviewed-by: Timothy Arceri <[email protected]>
* radeonsi: clean up passing the is_monolithic flag for compilationMarek Olšák2018-06-251-16/+14
| | | | Reviewed-by: Timothy Arceri <[email protected]>
* radeonsi: fix passing gl_ClipVertex for GS and tessMarek Olšák2018-05-251-1/+4
| | | | | | Also add the fprintf call. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fix color inputs/outputs for GS and tessMarek Olšák2018-05-251-11/+19
| | | | | | | | | | GS is tested, tessellation is untested. Have outputs_written_before_ps for HW VS and outputs_written for other stages. The reason is that COLOR and BCOLOR alias for HW VS, which drives elimination of VS outputs based on PS inputs. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: skip ES output stores for undefined output componentsMarek Olšák2018-05-181-0/+3
| | | | | Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi: add struct si_compiler containing LLVMTargetMachineRefMarek Olšák2018-04-271-33/+33
| | | | | | | | It will contain more variables. Reviewed-by: Timothy Arceri <[email protected]> Tested-by: Benedikt Schemmer <ben at besd.de> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use r600_resource() typecast helperMarek Olšák2018-04-271-2/+1
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/radv/radeonsi: refactor max simd waves into common code.Dave Airlie2018-04-241-11/+1
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi/nir: fix crash in test involving the sample maskNicolai Hähnle2018-04-201-1/+2
| | | | Reviewed-by: Timothy Arceri <[email protected]>
* radeonsi: add support for VegaMMarek Olšák2018-04-181-0/+1
| | | | Acked-by: Nicolai Hähnle <[email protected]>
* radeonsi: add shader binary padding for UMRMarek Olšák2018-04-101-3/+15
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* radeonsi: move definitions out of r600_pipe_common.hMarek Olšák2018-04-051-1/+1
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: update copyrightsMarek Olšák2018-04-051-0/+1
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi/gfx9: fix bad LLVM params in monolithic LS+HSMarek Olšák2018-04-031-1/+5
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: implement GL_KHR_blend_equation_advancedMarek Olšák2018-04-021-2/+2
| | | | | | | MSAA is supported using sample shading. Layered rendering and all texture targets are also supported. Tested-by: Dieter Nützel <[email protected]>
* radeonsi: rename unpack_param -> si_unpack_paramMarek Olšák2018-04-021-27/+27
| | | | Tested-by: Dieter Nützel <[email protected]>
* radeonsi/nir: fix explicit component packing for geom/tess doublesTimothy Arceri2018-04-021-8/+11
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: gather buffers declared more accurately and use const fast pathTimothy Arceri2018-04-021-0/+7
| | | | | | | | For now we skip SI && HAVE_LLVM < 0x0600 for simplicity. We also skip setting the more accurate masks for builtin uniforms for now as it causes some piglit regressions. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: create load_const_buffer_desc_fast_path() helperTimothy Arceri2018-04-021-39/+49
| | | | | | | | This will be shared by the TGSI and NIR backends. For simplicity we leave the SI LLVM 5.0 and lower work around only in the TGSI backend. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: don't use the SPI barrier management bug workaroundMarek Olšák2018-03-281-0/+5
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* ac/nir: pass the nir variable through tcs loading.Dave Airlie2018-03-141-5/+4
| | | | | | | | | | | | I was going to have to add another parameter to this monster, so we should just pass the nir_variable in, I can't find any reason this would be a bad idea. This needed for the next fix. Fixes: 94f9591995 (radv/ac: add support for TCS/TES inputs/outputs.) Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi: expand constbuf 0 address correctly to fix Vega10 hangsMarek Olšák2018-03-081-4/+17
| | | | | | | | | | This is only required with the latest libdrm. This fixes 32-bit support with high addresses. (and possibly 64-bit support too because the high bits need to be masked out) Acked-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]>
* ac/radeonsi: add emit_kill to the abiTimothy Arceri2018-03-081-0/+1
| | | | | | | | This should fix a regression with Rocket League grass rendering on the NIR backend. Reviewed-by: Marek Olšák <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104717
* radeonsi: remove si_llvm_add_attributeMarek Olšák2018-03-071-15/+16
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* radeonsi: fix passing address32_hi to LLVM for high valuesMarek Olšák2018-03-071-2/+5
| | | | The old function treats high values as negative, which LLVM interprets as 0.
* ac: add ac_count_scratch_private_memory()Samuel Pitoiset2018-03-061-28/+4
| | | | | | | Imported from RadeonSI. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radeonsi/nir: fix handling of doubles for gs inputsTimothy Arceri2018-03-061-2/+6
| | | | | | | Fixes piglit test: tests/spec/arb_gpu_shader_fp64/execution/explicit-location-gs-fs-vs.shader_test Reviewed-by: Dave Airlie <[email protected]>
* radeonsi: move si_nir_load_input_gs() to si_shader.cTimothy Arceri2018-03-061-0/+20
| | | | | | | | All the tess shader and tgsi equivalents are here and it allows use to use llvm_type_is_64bit() in the following patch without exposing it externally. Reviewed-by: Dave Airlie <[email protected]>
* ac/radeonsi: add load_base_vertex() to the abiTimothy Arceri2018-02-281-0/+1
| | | | | | | | | | Fixes the following piglit tests: ./bin/arb_shader_draw_parameters-basevertex basevertex -auto -fbo ./bin/arb_shader_draw_parameters-basevertex basevertex-baseinstance -auto -fbo Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: create get_base_vertex() helperTimothy Arceri2018-02-281-14/+20
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: remove 2 unused user SGPRs from merged TES-GS with 32-bit pointersMarek Olšák2018-02-261-7/+23
| | | | | | The effect of the last 13 commits on user SGPR counts: Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: make SI_SGPR_VERTEX_BUFFERS the last user SGPR inputMarek Olšák2018-02-261-6/+10
| | | | | | | | so that it can be removed and replaced with inline VBO descriptors, and the pointer can be packed in unused bits of VBO descriptors. This also removes the pointer from merged TES-GS where it's useless. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: set correct num_input_sgprs for VS prolog in merged shadersMarek Olšák2018-02-261-24/+24
| | | | | | | We need to take num_input_sgprs from VS, not the second shader. No apps suffered from this. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: allow fewer input SGPRs in 2nd shader of merged shadersMarek Olšák2018-02-261-1/+5
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/nir: fix loading of doubles for tess varyingsTimothy Arceri2018-02-261-2/+10
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: fix lds store in tcs outputs handlingTimothy Arceri2018-02-261-1/+1
| | | | | | We were ignoring the channel offset. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: preload the tess offchip ring in TESMarek Olšák2018-02-241-12/+9
| | | | | | so that it's not done multiple times in branches Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: move tess ring address into TCS_OUT_LAYOUT, removes 2 TCS user SGPRsMarek Olšák2018-02-241-51/+53
| | | | | | | TCS_OUT_LAYOUT has 13 unused bits. That's enough for a 32-bit address aligned to 512KB. Hey, it's a 13-bit pointer! Reviewed-by: Nicolai Hähnle <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-03 20:04:42 +0000