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path: root/src/gallium/drivers/radeonsi/si_shader.c
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* radeonsi/ac: move most of emit_ddxy to shared code.Dave Airlie2017-02-031-71/+7
* radeonsi/ac: move get thread id to shared code.Dave Airlie2017-02-031-55/+2
* radeonsi/ac: move tbuffer store and buffer load to shared code.Dave Airlie2017-02-031-185/+40
* radeonsi/ac: move a bunch of load/store related things to common code.Dave Airlie2017-02-031-91/+27
* radeonsi/ac: move frag interp emission code to shared llvm code.Dave Airlie2017-02-021-87/+13
* radeonsi: remove si_shader_context::param_tess_offchipMarek Olšák2017-01-301-3/+3
* various: Fix missing DumpModule with recent LLVM.Bas Nieuwenhuizen2017-01-291-3/+3
* radeonsi: don't declare LDS in TESMarek Olšák2017-01-231-2/+1
* radeonsi: for the tess barrier, only use emit_waitcnt on SI and LLVM 3.9+Marek Olšák2017-01-171-2/+5
* radeonsi: implement GL_FIXED vertex formatMarek Olšák2017-01-161-2/+12
* radeonsi: implement 32-bit SNORM/UNORM/SSCALED/USCALED vertex formatsMarek Olšák2017-01-161-1/+51
* radeonsi: make fix_fetch 64-bitMarek Olšák2017-01-161-2/+2
* radeonsi: replace si_shader_context::soa by bld_baseSamuel Pitoiset2017-01-131-58/+54
* radeonsi: replace ctx->soa.outputs by ctx->outputsSamuel Pitoiset2017-01-131-11/+9
* radeonsi: move si_shader_context::soa::addr to si_shader_contextSamuel Pitoiset2017-01-131-2/+2
* radeonsi: allocate the array of immediates dynamicallySamuel Pitoiset2017-01-131-8/+8
* amd/common: unify cube map coordinate handling between radeonsi and radvNicolai Hähnle2017-01-131-1/+5
* radeonsi: num_records is in units of stride for swizzled buffers even on VINicolai Hähnle2017-01-121-2/+0
* radeonsi: cleanly communicate whether si_shader_dump should check R600_DEBUGMarek Olšák2017-01-091-9/+11
* radeonsi: unduplicate VS color export codeMarek Olšák2017-01-061-9/+2
* radeonsi: clean up more HAVE_LLVM #ifdefsMarek Olšák2017-01-061-8/+11
* radeonsi: shrink each vertex stream to the actually required sizeNicolai Hähnle2016-12-121-10/+18
* radeonsi: use a single descriptor for the GSVS ringNicolai Hähnle2016-12-121-8/+65
* radeonsi: pack GS output components for each vertex stream contiguouslyNicolai Hähnle2016-12-121-3/+8
* radeonsi: do not write non-existent components through the GSVS ringNicolai Hähnle2016-12-121-2/+4
* radeonsi: only write values belonging to the stream when emitting GS vertexNicolai Hähnle2016-12-121-0/+3
* radeonsi: generate an explicit switch instruction over vertex streamsNicolai Hähnle2016-12-121-8/+13
* radeonsi: fetch only outputs of current vertex stream from the GSVS ringNicolai Hähnle2016-12-121-16/+25
* radeonsi: only export from GS copy shader for vertex stream 0Nicolai Hähnle2016-12-121-12/+19
* radeonsi: do not export VS outputs from vertex streams != 0Nicolai Hähnle2016-12-121-0/+6
* radeonsi: pull iteration over vertex streams into GS copy shader logicNicolai Hähnle2016-12-121-25/+37
* radeonsi: group streamout writes by vertex streamNicolai Hähnle2016-12-121-10/+22
* radeonsi: load the streamout buf descriptors closer to their useNicolai Hähnle2016-12-121-14/+11
* radeonsi: extract writing of a single streamout outputNicolai Hähnle2016-12-121-39/+52
* radeonsi: separate the call to si_llvm_emit_streamout from exportsNicolai Hähnle2016-12-121-4/+4
* radeonsi: plumb the output vertex_stream through to si_shader_output_valuesNicolai Hähnle2016-12-121-1/+9
* radeonsi: rename members of si_shader_output_valuesNicolai Hähnle2016-12-121-8/+8
* radeonsi: fix an off-by-one error in the bounds check for max_verticesNicolai Hähnle2016-12-121-1/+1
* radeonsi: do not kill GS with memory writesNicolai Hähnle2016-12-121-8/+22
* radeonsi: Fix typo: "llvm.fs.interp" => "llvm.SI.fs.interp"Michel Dänzer2016-12-081-1/+1
* radeonsi: wait for outstanding LDS instructions in memory barriers if neededMarek Olšák2016-12-071-1/+17
* radeonsi: wait for outstanding memory instructions in TCS barriersMarek Olšák2016-12-071-1/+5
* radeonsi: allow specifying simm16 of emit_waitcnt at call sitesMarek Olšák2016-12-071-5/+7
* radeonsi: take LDS into account for compute shader occupancy statsMarek Olšák2016-12-071-11/+18
* radeonsi: fix isolines tess factor writes to control ringNicolai Hähnle2016-12-071-4/+12
* radeonsi: Use amdgcn intrinsics for fs interpolationTom Stellard2016-12-071-54/+142
* radeonsi: don't apply the Z export bug workaround to HainanMarek Olšák2016-12-011-2/+3
* radeonsi: apply a TC L1 write corruption workaround for SIMarek Olšák2016-12-011-11/+23
* radeonsi: apply a multi-wave workgroup SPI bug workaround to affected CIK chipsMarek Olšák2016-12-011-2/+22
* radeonsi: consolidate max-work-group-size computationMarek Olšák2016-12-011-24/+19
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