summaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers/radeonsi/si_shader.c
Commit message (Expand)AuthorAgeFilesLines
* radeonsi: fix passing address32_hi to LLVM for high valuesMarek Olšák2018-03-071-2/+5
* ac: add ac_count_scratch_private_memory()Samuel Pitoiset2018-03-061-28/+4
* radeonsi/nir: fix handling of doubles for gs inputsTimothy Arceri2018-03-061-2/+6
* radeonsi: move si_nir_load_input_gs() to si_shader.cTimothy Arceri2018-03-061-0/+20
* ac/radeonsi: add load_base_vertex() to the abiTimothy Arceri2018-02-281-0/+1
* radeonsi: create get_base_vertex() helperTimothy Arceri2018-02-281-14/+20
* radeonsi: remove 2 unused user SGPRs from merged TES-GS with 32-bit pointersMarek Olšák2018-02-261-7/+23
* radeonsi: make SI_SGPR_VERTEX_BUFFERS the last user SGPR inputMarek Olšák2018-02-261-6/+10
* radeonsi: set correct num_input_sgprs for VS prolog in merged shadersMarek Olšák2018-02-261-24/+24
* radeonsi: allow fewer input SGPRs in 2nd shader of merged shadersMarek Olšák2018-02-261-1/+5
* radeonsi/nir: fix loading of doubles for tess varyingsTimothy Arceri2018-02-261-2/+10
* radeonsi/nir: fix lds store in tcs outputs handlingTimothy Arceri2018-02-261-1/+1
* radeonsi: preload the tess offchip ring in TESMarek Olšák2018-02-241-12/+9
* radeonsi: move tess ring address into TCS_OUT_LAYOUT, removes 2 TCS user SGPRsMarek Olšák2018-02-241-51/+53
* radeonsi: move 2nd-shader descriptor pointers into s[0:1]Marek Olšák2018-02-241-30/+64
* radeonsi: move TCS_OUT_LAYOUT.PatchVerticesIn to lower bitsMarek Olšák2018-02-241-1/+1
* radeonsi/nir: fix tess varying loads for doublesTimothy Arceri2018-02-221-2/+2
* ac/radeonsi: pass type to load_tess_varyings()Timothy Arceri2018-02-221-0/+2
* radeonsi: implement 32-bit pointers in user data SGPRs (v2)Marek Olšák2018-02-171-44/+74
* radeonsi/nir: fix si_nir_load_tcs_varyings() for outputsTimothy Arceri2018-02-151-2/+11
* radeonsi: make si_declare_compute_memory() more generic and call for nirTimothy Arceri2018-02-131-4/+10
* ac: remove unused parameters in abi::load_tess_coord()Samuel Pitoiset2018-02-121-4/+2
* ac: add load_sample_mask_in() to the ABISamuel Pitoiset2018-02-121-0/+6
* ac: add ac_build_export_null() helperSamuel Pitoiset2018-02-081-20/+1
* ac/radeonsi: add num_work_groups to the abiTimothy Arceri2018-02-071-2/+2
* ac/radeonsi: create ac_build_shader_clock() helperTimothy Arceri2018-02-071-5/+1
* ac/radeonsi: add load_local_group_size() to the abiTimothy Arceri2018-02-071-0/+1
* radeonsi: add get_block_size() helperTimothy Arceri2018-02-071-20/+27
* ac/radeonsi: add local_invocation_ids to the abiTimothy Arceri2018-02-071-2/+2
* ac/radeonsi: add workgroup_ids to the abiTimothy Arceri2018-02-071-5/+4
* radeonsi: use pknorm_i16/u16 and pk_i16/u16 LLVM intrinsicsMarek Olšák2018-02-021-113/+39
* ac: add glc parameter to ac_build_buffer_load_formatMarek Olšák2018-02-011-1/+1
* radeonsi: load the right number of components for VS inputs and TBOsMarek Olšák2018-02-011-3/+10
* radeonsi: print shader-db stats for main parts, not final binariesMarek Olšák2018-01-311-13/+20
* radeonsi: move max_simd_waves computation into a separate functionMarek Olšák2018-01-311-12/+22
* ac/radeonsi: add lookup_interp_param and load_sample_position to the abiTimothy Arceri2018-01-311-0/+2
* radeonsi/nir: add prim_mask to the abiTimothy Arceri2018-01-311-3/+4
* radeonsi/nir: adjust load_sample_position() to be shared between backendsTimothy Arceri2018-01-311-2/+3
* ac: rename and move si_const_array into common codeMarek Olšák2018-01-271-13/+6
* ac: move address space definitions to common codeMarek Olšák2018-01-271-8/+3
* ac: don't use byval LLVM qualifier in shadersMarek Olšák2018-01-271-12/+5
* ac: pass the number of channels to ac_build_buffer_load_format()Samuel Pitoiset2018-01-261-1/+1
* ac/radeonsi: add emit primitive to the abiTimothy Arceri2018-01-231-0/+1
* radeonsi: add generic emit primitive helperTimothy Arceri2018-01-231-7/+14
* ac/radeonsi: add tcs load outputs supportTimothy Arceri2018-01-181-15/+27
* ac: fix build error in si_shaderMauro Rossi2018-01-131-1/+1
* ac: add load_patch_vertices_in() to the abiTimothy Arceri2018-01-111-6/+14
* ac: add load_tess_level() to the abiTimothy Arceri2018-01-091-0/+22
* radeonsi: add load_tess_level() helperTimothy Arceri2018-01-091-14/+19
* ac/radeonsi: add load_tess_coord() to the abiTimothy Arceri2018-01-051-17/+25