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path: root/src/gallium/drivers/radeonsi/si_gfx_cs.c
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* radeonsi/gfx10: set PA_CL_VS_OUT_CNTL with CONTEXT_REG_RMW to fix edge flagsMarek Olšák2019-08-271-1/+4
* ac: add has_clear_state to ac_gpu_infoSamuel Pitoiset2019-08-271-1/+1
* radeonsi/gfx10: add global use_ngg and use_ngg_streamout flagsMarek Olšák2019-08-061-6/+6
* radeonsi/gfx10: fix and enable CLEAR_STATEMarek Olšák2019-07-231-0/+3
* radeonsi: set FLUSH_ON_BINNING_TRANSITION when neededMarek Olšák2019-07-091-0/+1
* radeonsi/gfx10: export correct PrimitiveID from NGG vertex shadersMarek Olšák2019-07-031-0/+1
* radeonsi/gfx10: fix GL_LINE polygon mode for decomposed primitivesMarek Olšák2019-07-031-0/+1
* radeonsi/gfx10: allocate GDS BOs for streamoutMarek Olšák2019-07-031-8/+31
* radeonsi/gfx10: make sure GDS is idle between IBsMarek Olšák2019-07-031-7/+13
* radeonsi/gfx10: implement streamoutNicolai Hähnle2019-07-031-1/+2
* radeonsi/gfx10: emit VGT_GS_OUT_PRIM_TYPE from draw and add it to VS_STATENicolai Hähnle2019-07-031-1/+0
* radeonsi/gfx10: add si_context::emit_cache_flushNicolai Hähnle2019-07-031-1/+1
* radeonsi: rename and re-document cache flush flagsMarek Olšák2019-06-241-4/+4
* radeonsi: cull primitives with async compute for large draw callsMarek Olšák2019-05-161-0/+80
* winsys/amdgpu: add REWIND emulation via INDIRECT_BUFFER into cs_check_spaceMarek Olšák2019-05-161-1/+1
* ac: rename SI-CIK-VI to GFX6-GFX7-GFX8Marek Olšák2019-05-151-3/+3
* radeonsi: remove dirty slot masks from scissor and viewport statesMarek Olšák2019-04-251-3/+0
* radeonsi: delay adding BOs at the beginning of IBs until the first drawMarek Olšák2019-04-231-1/+0
* radeonsi: add helper si_get_minimum_num_gfx_cs_dwordsMarek Olšák2019-04-231-7/+1
* radeonsi: always use compute rings for clover on CI and newer (v2)Marek Olšák2019-02-261-11/+18
* radeonsi: use SDMA for uploading data through const_uploaderMarek Olšák2019-02-201-6/+36
* radeonsi: rename r600_resource -> si_resourceMarek Olšák2019-01-221-1/+1
* radeonsi: remove r600 from commentsMarek Olšák2019-01-221-1/+1
* radeonsi: move emission of PA_SU_VTX_CNTL into emit_guardbandMarek Olšák2018-10-161-0/+1
* radeonsi: set PA_SU_PRIM_FILTER_CNTL optimallyMarek Olšák2018-10-161-0/+1
* radeonsi: center viewport to improve guardband clipping for high resolutionsMarek Olšák2018-10-161-0/+1
* radeonsi:optimizing SET_CONTEXT_REG for shaders vgt_vertex_reuseSonny Jiang2018-10-051-0/+1
* radeonsi:optimizing SET_CONTEXT_REG for shaders TessellationSonny Jiang2018-10-051-0/+1
* radeonsi:optimizing SET_CONTEXT_REG for shaders PSSonny Jiang2018-10-051-0/+7
* radeonsi:optimizing SET_CONTEXT_REG for shaders VSSonny Jiang2018-10-051-0/+6
* radeonsi:optimizing SET_CONTEXT_REG for shaders GSSonny Jiang2018-10-051-1/+14
* radeonsi: optimizing SET_CONTEXT_REG for shaders ESSonny Jiang2018-10-051-0/+1
* Revert "radeonsi: avoid syncing the driver thread in si_fence_finish"Timothy Arceri2018-09-181-2/+0
* radeonsi: fix printing a BO list into ddebug reportsMarek Olšák2018-09-101-1/+2
* radeonsi: implement EXT_window_rectanglesMarek Olšák2018-08-141-0/+4
* radeonsi: emit_spi_map packets optimizationSonny Jiang2018-07-201-0/+3
* radeonsi: emit_guardband packets optimizationSonny Jiang2018-07-181-0/+4
* radeonsi: Save CLEAR_STATE initial values for optimizationSonny Jiang2018-07-181-2/+26
* amd,radeonsi: rename radeon_winsys_cs -> radeon_cmdbufMarek Olšák2018-06-191-2/+2
* radeonsi: move the guardband registers into a separate state atomMarek Olšák2018-06-131-0/+1
* radeonsi: don't set VGT_LS_HS_CONFIG if it doesn't changeMarek Olšák2018-06-131-0/+1
* radeonsi: move VGT_GS_OUT_PRIM_TYPE into si_shader_gsMarek Olšák2018-06-131-1/+0
* radeonsi: emit_db_render_state packets optimizationSonny Jiang2018-06-071-0/+3
* ac/gpu_info: add kernel_flushes_tc_l2_after_ibMarek Olšák2018-05-101-2/+1
* radeonsi: use r600_resource() typecast helperMarek Olšák2018-04-271-3/+2
* radeonsi: inline 2 trivial state structuresMarek Olšák2018-04-271-2/+2
* radeonsi: don't use an indirect table for state atomsMarek Olšák2018-04-271-17/+17
* radeonsi: don't emit partial flushes for internal CS flushes onlyMarek Olšák2018-04-161-2/+2
* radeonsi: implement mechanism for IBs without partial flushes at the end (v6)Marek Olšák2018-04-161-16/+39
* radeonsi: restore si_emit_cache_flush call at the end of IBsMarek Olšák2018-04-131-0/+2
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