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path: root/src/gallium/drivers/radeonsi/si_get.c
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* gallium: add scalar isa shader capChristian Gmeiner2018-06-201-0/+2
| | | | | | | | | | | | | | | | v1 -> v2: - nv30 is _NOT_ scalar as suggested by Ilia Mirkin. - Change from a screen cap to a shader cap as suggested by Eric Anholt. - radeonsi is scalar as suggested by Marek Olšák. - Change missing ones to be scalar. v2 -> v3: - r600 prefers vec4 as suggested by Marek Olšák. Signed-off-by: Christian Gmeiner <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: enable OpenGL 3.3 compat profileTimothy Arceri2018-06-191-1/+1
| | | | Reviewed-by: Marek Olšák <[email protected]>
* gallium: add support for programmable sample locationsRhys Perry2018-06-141-0/+1
| | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Brian Paul <[email protected]> (v2) Reviewed-by: Marek Olšák <[email protected]> (v2)
* radeonsi: return real memory usage instead of per-process usageMarek Olšák2018-06-131-2/+2
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* gallium: add PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITYMarek Olšák2018-05-291-0/+3
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* amd: remove support for LLVM 4.0Marek Olšák2018-05-171-3/+1
| | | | | | | It doesn't support GFX9. Acked-by: Dave Airlie <[email protected]> Acked-by: Samuel Pitoiset <[email protected]>
* ac/gpu_info: add has_2d_tilingMarek Olšák2018-05-101-5/+1
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/gpu_info: add has_sparse_vm_mappingsMarek Olšák2018-05-101-11/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/gpu_info: add has_unaligned_shader_loadsMarek Olšák2018-05-101-5/+1
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: expose ARB_query_buffer_object on ancient kernels tooMarek Olšák2018-05-101-3/+1
| | | | | | It doesn't use indirect dispatches. Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/gpu_info: add has_indirect_compute_dispatchMarek Olšák2018-05-101-13/+3
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: clean up the reset status query implementationMarek Olšák2018-05-101-3/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: work around a GPU hang due to broken indirect indexing in LLVMMarek Olšák2018-05-101-0/+9
| | | | | | Fixes: 6d19120da85 "radeonsi/gfx9: workaround for INTERP with indirect indexing" Cc: 18.1 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium: add initial support for conservative rasterizationRhys Perry2018-04-301-0/+10
| | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/gfx9: workaround for INTERP with indirect indexingMarek Olšák2018-04-271-6/+13
| | | | | | | and clean up the conditions. Reviewed-by: Nicolai Hähnle <[email protected]> Cc: 18.0 18.1 <[email protected]>
* radeonsi: add support for VegaMMarek Olšák2018-04-181-1/+2
| | | | Acked-by: Nicolai Hähnle <[email protected]>
* radeonsi: simplify generating the renderer stringMarek Olšák2018-04-131-11/+8
| | | | | | | HAVE_LLVM > 0 is a tautology. Reviewed-by: Samuel Pitoiset <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* radeonsi: use PIPE_FORMAT_P016 format for VP9 profile2Leo Liu2018-04-121-1/+2
| | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Christian König <[email protected]>
* radeonsi: cap VP9 support to progressive bufferLeo Liu2018-04-121-0/+2
| | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Christian König <[email protected]>
* radeonsi: cap VP9 support to RavenLeo Liu2018-04-121-0/+4
| | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Christian König <[email protected]>
* radeonsi: move definitions out of r600_pipe_common.hMarek Olšák2018-04-051-2/+2
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: update copyrightsMarek Olšák2018-04-051-0/+1
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: implement GL_KHR_blend_equation_advancedMarek Olšák2018-04-021-1/+1
| | | | | | | MSAA is supported using sample shading. Layered rendering and all texture targets are also supported. Tested-by: Dieter Nützel <[email protected]>
* radeonsi: add support for Vega12Marek Olšák2018-03-281-0/+1
| | | | Reviewed-by: Alex Deucher <[email protected]>
* st/radeonsi: enable uniform packing in NIR backendTimothy Arceri2018-03-201-1/+5
| | | | Reviewed-by: Marek Olšák <[email protected]>
* gallium: add packed uniform CAPTimothy Arceri2018-03-201-0/+1
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: disable vertex_id_zero_based loweringTimothy Arceri2018-02-281-1/+0
| | | | | | | | | | The lowering is incompatible with how the radeonsi backend works. Fixes piglit test: ./bin/arb_shader_draw_parameters-basevertex vertexid-zerobased -auto Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: enable lowering of fpowTimothy Arceri2018-02-261-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Lowering fpow in NIR rather than LLVM can be beneficial. Polaris results: Totals from affected shaders: SGPRS: 124928 -> 124896 (-0.03 %) VGPRS: 68616 -> 68332 (-0.41 %) Spilled SGPRs: 394 -> 413 (4.82 %) Spilled VGPRs: 0 -> 0 (0.00 %) Private memory VGPRs: 0 -> 0 (0.00 %) Scratch size: 0 -> 0 (0.00 %) dwords per thread Code Size: 3668912 -> 3658368 (-0.29 %) bytes LDS: 0 -> 0 (0.00 %) blocks Max Waves: 18575 -> 18593 (0.10 %) Wait states: 0 -> 0 (0.00 %) Fixes: d6b753920677 "ac/nir: remove emission of nir_op_fpow" Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: disable GLSL IR loop unrollingTimothy Arceri2018-02-221-0/+2
| | | | | | | | | | | | | | | | | | | | | | | Delaying unrolling and allowing NIR to do it instead has been shown to result in better code in drivers such as i965. shader-db results appear to show the same is true for radeonsi. The other advantage is that using NIR unrolling improves compile times significantly. Totals from affected shaders: SGPRS: 9624 -> 10016 (4.07 %) VGPRS: 6800 -> 6464 (-4.94 %) Spilled SGPRs: 0 -> 2 (0.00 %) Spilled VGPRs: 0 -> 0 (0.00 %) Private memory VGPRs: 0 -> 0 (0.00 %) Scratch size: 0 -> 0 (0.00 %) dwords per thread Code Size: 359176 -> 332264 (-7.49 %) bytes LDS: 0 -> 0 (0.00 %) blocks Max Waves: 1355 -> 1432 (5.68 %) Wait states: 0 -> 0 (0.00 %) Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: enable uvd encode for HEVC mainJames Zhu2018-02-211-1/+3
| | | | | | | Enable UVD encode for HEVC main profile Signed-off-by: James Zhu <[email protected]> Reviewed-by: Boyuan Zhang <[email protected]>
* radeonsi: disallow constant buffers with a 64-bit address in slot 0Marek Olšák2018-02-171-1/+3
| | | | | | | State trackers must use a user buffer or const_uploader, or set pipe_resource::flags same as const_uploader->flags. Reviewed-by: Samuel Pitoiset <[email protected]>
* gallium: allow drivers to impose BO flags restrictions on constant buffer 0Marek Olšák2018-02-171-0/+1
| | | | Required by radeonsi for optimal behavior.
* gallium: drop all the guard band float caps.Dave Airlie2018-02-141-5/+0
| | | | | | | | | | Nobody queries these and nobody sets them to anything useful, the docs say TODO. Drop them until a use appears. Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi: stop returning PIPE_SHADER_IR_NATIVE for PIPE_SHADER_CAP_PREFERRED_IRTimothy Arceri2018-02-101-3/+0
| | | | | | | | | Clover now checks PIPE_SHADER_CAP_SUPPORTED_IRS for native support instead. This change indirectly enables NIR support for compute shaders on radeonsi. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: add nir support for compiling compute shadersTimothy Arceri2018-02-071-4/+4
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: enable vcn encode for HEVC mainBoyuan Zhang2018-02-051-1/+3
| | | | | | | Enable vcn encode for HEVC main profile on Raven. Signed-off-by: Boyuan Zhang <[email protected]> Acked-by: Christian König <[email protected]>
* amd: remove support for LLVM 3.9Marek Olšák2018-02-021-10/+3
| | | | | | | | | | | Only these are supported: - LLVM 4.0 - LLVM 5.0 - LLVM 6.0 - master (7.0) Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi: fix fence_server_sync() holding up extra work v2Andres Rodriguez2018-01-301-1/+3
| | | | | | | | | | | | | | | When calling si_fence_server_sync(), the wait operation is associated with the next kernel submission. Therefore, any unflushed work submitted previous to fence_server_sync() will also be affected by the wait. To avoid adding the dependency to the unflushed work, we flush before emitting the fence dependency. v2: s/semaphore/fence Signed-off-by: Andres Rodriguez <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium: introduce PIPE_CAP_FENCE_SIGNAL v2Andres Rodriguez2018-01-301-0/+1
| | | | | | | | | Protects semaphore signaling functionality required by GL_EXT_semaphore. v2: s/semaphore/fence Signed-off-by: Andres Rodriguez <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium: remove PIPE_CAP_USER_CONSTANT_BUFFERSMarek Olšák2018-01-171-1/+0
| | | | | Reviewed-by: Roland Scheidegger <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* gallium: remove PIPE_CAP_TEXTURE_SHADOW_MAPMarek Olšák2018-01-171-1/+0
| | | | | Reviewed-by: Roland Scheidegger <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* gallium: remove PIPE_CAP_TWO_SIDED_STENCILMarek Olšák2018-01-171-1/+0
| | | | | Reviewed-by: Roland Scheidegger <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* radeonsi: bump glsl version to 450 for nir backendTimothy Arceri2018-01-181-6/+1
| | | | | | | | | | We still have more work to do but piglit results are looking pretty good. At GLSL 1.50 we have 30647/31118 piglit tests passing. At GLSL 4.50 we have 37927/38551 piglit tests passing. Reviewed-by: Nicolai Hähnle <[email protected]>
* radv/radeonsi/nir: lower 64bit flrpTimothy Arceri2018-01-131-0/+1
| | | | | | | | Fixes a bunch of arb_gpu_shader_fp64 piglit tests for example: generated_tests/spec/arb_gpu_shader_fp64/execution/built-in-functions/fs-mix-double-double-double.shader_test Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: rename has_sync_file to has_fence_to_handle.Bas Nieuwenhuizen2018-01-041-1/+1
| | | | | | | | | | | sync_files are in linux since 4.7, while the amdgpu fence_to_handle ioctl is only in 4.15. In particular we don't need it for sync_file in radv, because everything happens via syncobjs, which got support earlier than fence_to_handle. Reviewed-by: Marek Olšák <[email protected]>
* gallium: plumb context priority through to driverRob Clark2017-12-191-0/+1
| | | | | | | | Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Andres Rodriguez <[email protected]> Reviewed-by: Wladimir J. van der Laan <[email protected]>
* st/glsl_to_nir/radeonsi: enable gs support for nir backendTimothy Arceri2017-12-041-1/+2
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: remove r600_common_screenMarek Olšák2017-11-291-85/+85
| | | | | | | | | | Most files in gallium/radeon now include si_pipe.h. chip_class and family are now here: sscreen->info.family sscreen->info.chip_class Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: document our vendor string situationMarek Olšák2017-11-291-0/+3
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: move video queries into si_get.cMarek Olšák2017-11-291-1/+149
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
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