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path: root/src/gallium/drivers/radeonsi/si_fence.c
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* gallium: switch boolean -> bool at the interface definitionsIlia Mirkin2019-07-221-4/+4
| | | | | | | | | | | | | | | | | | This is a relatively minimal change to adjust all the gallium interfaces to use bool instead of boolean. I tried to avoid making unrelated changes inside of drivers to flip boolean -> bool to reduce the risk of regressions (the compiler will much more easily allow "dirty" values inside a char-based boolean than a C99 _Bool). This has been build-tested on amd64 with: Gallium drivers: nouveau r300 r600 radeonsi freedreno swrast etnaviv v3d vc4 i915 svga virgl swr panfrost iris lima kmsro Gallium st: mesa xa xvmc xvmc vdpau va Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Acked-by: Alyssa Rosenzweig <[email protected]>
* radeonsi: fix timestamp queries for compute-only contextsMarek Olšák2019-05-291-3/+5
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Tested-by: Jan Vesely <[email protected]>
* radeonsi: cull primitives with async compute for large draw callsMarek Olšák2019-05-161-3/+5
| | | | | Tested-by: Dieter Nützel <[email protected]> Acked-by: Nicolai Hähnle <[email protected]>
* winsys/amdgpu: add a parallel compute IB coupled with a gfx IBMarek Olšák2019-05-161-2/+2
| | | | | Tested-by: Dieter Nützel <[email protected]> Acked-by: Nicolai Hähnle <[email protected]>
* radeonsi: add a cs parameter into si_cp_release_memMarek Olšák2019-05-161-3/+2
| | | | | Tested-by: Dieter Nützel <[email protected]> Acked-by: Nicolai Hähnle <[email protected]>
* ac: rename SI-CIK-VI to GFX6-GFX7-GFX8Marek Olšák2019-05-151-4/+4
| | | | | | | | | | | | Acked-by: Dave Airlie <[email protected]> We already use GFX9 and I don't want us to have confusing naming in the driver. GFXn naming is better from the driver perspective, because it's the real version of the gfx portion of the hw. Also, CIK means Bonaire-Kaveri-Kabini, it doesn't mean CI. It shouldn't confuse our SDMA, UVD, VCE etc. code much. Those have nothing to do with GFXn and they have their own version numbers.
* radeonsi: don't ignore PIPE_FLUSH_ASYNCMarek Olšák2019-04-261-1/+1
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: fix a comment typo in si_fine_fence_setMarek Olšák2019-01-301-1/+1
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* radeonsi: rename rfence -> sfenceMarek Olšák2019-01-221-49/+49
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi: rename rsrc -> ssrc, rdst -> sdstMarek Olšák2019-01-221-10/+10
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi: rename r600_resource -> si_resourceMarek Olšák2019-01-221-6/+6
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi: move PKT3_WRITE_DATA generation into a helper functionMarek Olšák2019-01-221-13/+8
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi: fix the top-of-pipe fence on SIMarek Olšák2019-01-221-1/+2
| | | | | | SI doesn't have MEM. Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi: correct WRITE_DATA.DST_SEL definitionsMarek Olšák2019-01-221-1/+1
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi: make si_cp_wait_mem more configurableMarek Olšák2019-01-021-4/+2
| | | | Tested-by: Dieter Nützel <[email protected]>
* radeonsi: don't send data after write-confirm with BOTTOM_OF_PIPE_TSMarek Olšák2018-11-201-2/+1
| | | | | | | There are no writes. Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radeonsi: rename si_gfx_* functions to si_cp_*Marek Olšák2018-10-161-16/+16
| | | | and write_event_eop -> release_mem
* radeonsi: make si_gfx_write_event_eop more configurableMarek Olšák2018-10-161-10/+13
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* Revert "radeonsi: avoid syncing the driver thread in si_fence_finish"Timothy Arceri2018-09-181-42/+40
| | | | | | | | | | This reverts commit bc65dcab3bc48673ff6180afb036561a4b8b1119. This was manually reverted. Reverting stops the menu hanging in some id tech games such as RAGE and Wolfenstein The New Order. Reviewed-by: Marek Olšák <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107891
* amd,radeonsi: rename radeon_winsys_cs -> radeon_cmdbufMarek Olšák2018-06-191-3/+3
| | | | Acked-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi: don't emit partial flushes for internal CS flushes onlyMarek Olšák2018-04-161-1/+4
| | | | | Tested-by: Benedikt Schemmer <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove r600_common_contextMarek Olšák2018-04-051-34/+34
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: remove r600_pipe_common::screenMarek Olšák2018-04-051-1/+1
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: move r600_cs.h contents into si_pipe.h, si_build_pm4.hMarek Olšák2018-04-051-2/+1
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: update copyrightsMarek Olšák2018-04-051-0/+1
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: switch radeon_add_to_buffer_list parameter to si_contextMarek Olšák2018-04-051-4/+4
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: use r600_common_context less pt3Marek Olšák2018-04-051-7/+5
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: use r600_common_context less pt2Marek Olšák2018-04-051-16/+16
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: use r600_common_context less pt1Marek Olšák2018-04-051-26/+26
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: flatten / remove struct r600_ringMarek Olšák2018-04-051-18/+18
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: remove r600_ring::flush callbackMarek Olšák2018-04-051-3/+3
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: move EOP event code from r600_pipe_common.c to si_fence.cMarek Olšák2018-04-051-0/+121
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: fix fence_server_sync() holding up extra work v2Andres Rodriguez2018-01-301-24/+25
| | | | | | | | | | | | | | | When calling si_fence_server_sync(), the wait operation is associated with the next kernel submission. Therefore, any unflushed work submitted previous to fence_server_sync() will also be affected by the wait. To avoid adding the dependency to the unflushed work, we flush before emitting the fence dependency. v2: s/semaphore/fence Signed-off-by: Andres Rodriguez <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: implement semaphore_server_signal v2Andres Rodriguez2018-01-301-0/+37
| | | | | | | | | | | Syncobj based waits or signals only happen at submission boundaries. In order to guarantee that the requested signal event will occur when the state tracker requested it, we must issue a flush. v2: s/fence/semaphore for pipe objects Signed-off-by: Andres Rodriguez <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: add support for importing PIPE_FD_TYPE_SYNCOBJ semaphoresAndres Rodriguez2018-01-301-6/+20
| | | | | | | Hook up importing semaphores of type PIPE_FD_TYPE_SYNCOBJ Signed-off-by: Andres Rodriguez <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium: add type parameter to create_fence_fdAndres Rodriguez2018-01-301-1/+4
| | | | | | | | | | | An fd can potentially have different types of objects backing it. Specifying the type helps us make sure we treat the FD correctly. This is in preparation to allow importing syncobj fence FDs in addition to native sync FDs. Signed-off-by: Andres Rodriguez <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Export signalled sync file instead of -1.Bas Nieuwenhuizen2018-01-261-0/+2
| | | | | | | | -1 is considered an error for EGL_ANDROID_native_fence_sync, so we need to actually create a sync file. Fixes: f536f45250 "radeonsi: implement sync_file import/export" Reviewed-by: Dave Airlie <[email protected]>
* ac: rename has_sync_file to has_fence_to_handle.Bas Nieuwenhuizen2018-01-041-2/+2
| | | | | | | | | | | sync_files are in linux since 4.7, while the amdgpu fence_to_handle ioctl is only in 4.15. In particular we don't need it for sync_file in radv, because everything happens via syncobjs, which got support earlier than fence_to_handle. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: use a separate allocator for fine fencesMarek Olšák2017-12-061-1/+1
| | | | | Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* r300,r600,radeonsi: replace RADEON_FLUSH_* with PIPE_FLUSH_*Marek Olšák2017-11-291-3/+3
| | | | | | and handle PIPE_FLUSH_HINT_FINISH in r300. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove r600_common_screenMarek Olšák2017-11-291-11/+11
| | | | | | | | | | Most files in gallium/radeon now include si_pipe.h. chip_class and family are now here: sscreen->info.family sscreen->info.chip_class Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: check that we don't leak fine.buf referencesNicolai Hähnle2017-11-281-0/+2
| | | | | | Just as an added precaution. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: try flushing unflushed fences in si_fence_finish even when timeout ↵Nicolai Hähnle2017-11-261-3/+3
| | | | | | | | | | | | | | | | | == 0 Under certain conditions, waiting on a GL sync objects should act like a flush, regardless of the timeout. Portal 2, CS:GO, and presumably other Source engine games rely on this behavior and hang during loading without this fix. Fixes: bc65dcab3bc4 ("radeonsi: avoid syncing the driver thread in si_fence_finish") Signed-off-by: Marek Olšák <[email protected]> Tested-by: Kai Wasserbäch <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103902 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103904
* gallium/u_threaded: avoid syncing in threaded_context_flushNicolai Hähnle2017-11-201-1/+2
| | | | | | | | We could always do the flush asynchronously, but if we're going to wait for a fence anyway and the driver thread is currently idle, the additional communication overhead isn't worth it. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: avoid syncing the driver thread in si_fence_finishNicolai Hähnle2017-11-201-37/+38
| | | | | | It is really only required when we need to flush for deferred fences. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: recompute the relative timeout after waiting for ready fenceNicolai Hähnle2017-11-201-0/+5
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: implement PIPE_FLUSH_{TOP,BOTTOM}_OF_PIPENicolai Hähnle2017-11-091-1/+88
| | | | | | | v2: use uncached system memory for the fence, and use the CPU to clear it so we never read garbage when checking the fence Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: document some subtle details of fence_finish & fence_server_syncNicolai Hähnle2017-11-091-0/+22
| | | | | | | v2: remove the change to si_fence_server_sync, we'll handle that more robustly Reviewed-by: Marek Olšák <[email protected]>
* gallium/u_threaded: implement asynchronous flushesNicolai Hähnle2017-11-091-25/+79
| | | | | | | | | | | | | This requires out-of-band creation of fences, and will be signaled to the pipe_context::flush implementation by a special TC_FLUSH_ASYNC flag. v2: - remove an incorrect assertion - handle fence_server_sync for unsubmitted fences by relying on the improved cs_add_fence_dependency - only implement asynchronous flushes on amdgpu Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: move fence functions to si_fence.cNicolai Hähnle2017-11-091-0/+304
Reviewed-by: Marek Olšák <[email protected]>
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