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path: root/src/gallium/drivers/radeonsi/si_descriptors.c
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* radeonsi: Clear sampler view flags when binding a bufferMichel Dänzer2014-10-031-0/+5
| | | | | | | | | Fixes assertion failure while running the Unreal Engine 4 Elemental demo: .../si_blit.c:322:si_decompress_color_textures: Assertion `tex->cmask.size || tex->fmask.size' failed. Cc: "10.2 10.3" <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: don't use pipe_constant_buffer for GS ringsMarek Olšák2014-09-241-5/+5
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: shorten si_pipe_* prefixes to si_*Marek Olšák2014-09-241-7/+7
| | | | | | | This was the original naming convention in r600g and it somehow crept into radeonsi. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: document what si_descriptors.c doesMarek Olšák2014-09-241-0/+11
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: cleanup header inclusionEmil Velikov2014-08-281-1/+1
| | | | | | | | | | | | | | - Add top_srcdir/src/gallium/winsys to GALLIUM_DRIVER_C{XXFLAGS}. - Remove top_srcdir/src/gallium/drivers/radeon from the includes. As a result: - Common radeon headers are prefixed with 'radeon/' - Winsys header inclusion is prefixed 'radeon/drm' Cc: Marek Olšák <[email protected]> Cc: Michel Dänzer <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: fix buffer invalidation of unbound texture buffer objectsMarek Olšák2014-08-141-5/+8
| | | | | | | This maintains a list of all TBOs in a pipe_context. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: simplify constant buffer upload for big endianMarek Olšák2014-08-101-18/+4
| | | | | | | | Point util_memcpy_cpu_to_le32 to a buffer storage directly. v2: simplify more Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: use gpu_address from r600_resourceMarek Olšák2014-08-091-19/+14
| | | | | Reviewed-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: Use util_memcpy_cpu_to_le32()Tom Stellard2014-07-281-3/+1
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: only update vertex buffers when they need updatingMarek Olšák2014-07-181-1/+15
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: remove nr_vertex_buffersMarek Olšák2014-07-181-2/+2
| | | | | | | | Unused. Also inline util_set_vertex_buffers_count and simplify it. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: move vertex buffer descriptors from IB to memoryMarek Olšák2014-07-181-6/+125
| | | | | | | | | | This removes the intermediate storage (pm4 state) and generates descriptors directly in a staging buffer. It also reduces the number of flushes, because the descriptors no longer take CS space. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: add support for fine-grained sampler view updatesMarek Olšák2014-07-181-22/+14
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: move si_set_sampler_views to si_descriptors.cMarek Olšák2014-07-181-4/+68
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: move sampler descriptors from IB to memoryMarek Olšák2014-07-181-0/+53
| | | | | | | | | | | | | | Sampler descriptors are now represented by si_descriptors. This also adds support for fine-grained sampler state updates and the border color update is now isolated in a separate function. Border colors have been broken if texturing from multiple shader stages is used. This patch doesn't change that. BTW, blitting already makes use of fine-grained state updates. u_blitter uses 2 textures at most, so we only have to save 2. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: assume LLVM 3.4.2 is always presentMarek Olšák2014-07-181-4/+2
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: rename definitions of shader limitsMarek Olšák2014-07-111-6/+6
| | | | Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: Enable geometry shaders with LLVM 3.4.1Tom Stellard2014-05-091-2/+2
| | | | | | Reviewed-by: Michel Dänzer <[email protected]> CC: "10.1 10.2" <[email protected]>
* radeonsi: Don't use anonymous struct trick in atom trackingAdam Jackson2014-05-081-3/+3
| | | | | | | | I'm somewhat impressed that current gccs will let you do this, but sufficiently old ones (including 4.4.7 in RHEL6) won't. Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Adam Jackson <[email protected]>
* r600g,radeonsi: attempt to fix racy multi-context apps calling BufferDataMarek Olšák2014-03-111-4/+1
| | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75061 v2: minimize the window where cs_buf != new_buf
* r600g,radeonsi: set priorities for relocationsMarek Olšák2014-03-111-18/+45
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* gallium: allow setting of the internal stream output offsetZack Rusin2014-03-071-2/+2
| | | | | | | | | | | | | | | | D3D10 allows setting of the internal offset of a buffer, which is in general only incremented via actual stream output writes. By allowing setting of the internal offset draw_auto is capable of rendering from buffers which have not been actually streamed out to. Our interface didn't allow. This change functionally shouldn't make any difference to OpenGL where instead of an append_bitmask you just get a real array where -1 means append (like in D3D) and 0 means do not append. Signed-off-by: Zack Rusin <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: fix freeing descriptor buffersChristian König2014-03-081-1/+1
| | | | | | | | That structure member is a pointer, so the loop with the Elements macro only freed up the first entry. Signed-off-by: Christian König <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Use util_cpu_to_le32() instead of bswap32() on big-endian systemsTom Stellard2014-02-241-1/+1
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* gallium: remove PIPE_USAGE_STATICMarek Olšák2014-02-061-1/+1
| | | | Reviewed-by: Brian Paul <[email protected]>
* r600g,radeonsi: set resource domains in one place (v2)Marek Olšák2014-02-061-2/+2
| | | | | | | v2: This doesn't change the behavior. It only moves the tiling check to r600_init_resource and removes the usage parameter. Reviewed-by: Christian König <[email protected]>
* radeonsi: Put GS ring buffer descriptors with streamout buffer descriptorsMichel Dänzer2014-01-291-36/+57
| | | | | | And mark the constant buffers as read only for the GPU again. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Pass VS resource descriptors to the HW ES shader stage as wellMichel Dänzer2014-01-291-3/+18
| | | | | | | This makes sure constants and samplers work in the vertex shader even when a geometry shader is active. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Initial geometry shader supportMichel Dänzer2014-01-291-1/+97
| | | | | | | Partly based on the corresponding r600g work by Vadim Girlin and Dave Airlie. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: cleanup includes, add missing licenseMarek Olšák2014-01-281-0/+1
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: remove si_resource.hMarek Olšák2014-01-281-1/+0
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: move si_upload_const_buffer to a better placeMarek Olšák2014-01-281-0/+27
| | | | | | | This gets rid of another file. Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: Rename the commonly occurring rctx/r600 variables.Andreas Hartmetz2014-01-141-114/+114
| | | | | | The "r" stands for R600. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Rename r600->si for functions in si_resource.h.Andreas Hartmetz2014-01-141-3/+3
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Rename r600->si for structs in si_pipe.h.Andreas Hartmetz2014-01-141-22/+22
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Apply si_* file naming scheme.Andreas Hartmetz2014-01-141-3/+3
| | | | Reviewed-by: Marek Olšák <[email protected]>
* r600g,radeonsi: fix initialized buffer range tracking for DMA, add commentsMarek Olšák2013-12-121-9/+12
| | | | | | | The DMA functions modify dst_offset and size and util_range_add gets wrong values. Reviewed-by: Michel Dänzer <[email protected]>
* r600g,radeonsi: add common interface for buffer invalidationMarek Olšák2013-12-121-1/+2
| | | | | | This will be used by common code in the next commit. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: handle PIPE_TRANSFER_DISCARD_WHOLE_RESOURCEMarek Olšák2013-12-121-0/+123
| | | | | | which can come from glBufferData and glMapBufferRange. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: implement accelerated buffer copyingMarek Olšák2013-12-121-0/+58
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: bind a dummy constant buffer in place of NULL buffersMarek Olšák2013-11-041-0/+6
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* radeonsi: implement clear_buffer using CP DMA, initialize CMASK with itMarek Olšák2013-09-291-1/+84
| | | | | | | | More work needs to be done for this to be entirely shared with r600g. I'm just trying to share r600_texture.c now. The reason I put the implementation to si_descriptors.c is that the emit function had already been there.
* radeonsi: bind streamout buffers to VGT and the vertex shaderMarek Olšák2013-09-131-0/+68
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: simplify and improve flushingMarek Olšák2013-08-311-7/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This mimics r600g. The R600_CONTEXT_xxx flags are added to rctx->b.flags and si_emit_cache_flush emits the packets. That's it. The shared radeon code tells us when the streamout cache should be flushed, so we have to check the flags anyway. There is a new atom "cache_flush", because caches must be flushed *after* resource descriptors are changed in memory. Functional changes: * Write caches are flushed at the end of CS and read caches are flushed at its beginning. * Sampler view states are removed from si_state, they only held the flush flags. * Everytime a shader is changed, the I cache is flushed. Is this needed? Due to a hw bug, this also flushes the K cache. * The WRITE_DATA packet is changed to use TC, which fixes a rendering issue in openarena. I'm not sure how TC interacts with CP DMA, but for now it seems to work better than any other solution I tried. (BTW CIK allows us to use TC for CP DMA.) * Flush the K cache instead of the texture cache when updating resource descriptors (due to a hw bug, this also flushes the I cache). I think the K cache flush is correct here, but I'm not sure if the texture cache should be flushed too (probably not considering we use TC for WRITE_DATA, but we don't use TC for CP DMA). * The number of resource contexts is decreased to 16. With all of these cache changes, 4 doesn't work, but 8 works, which suggests I'm actually doing the right thing here and the pipeline isn't drained during flushes. Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]> Tested-by: Tom Stellard <[email protected]>
* radeonsi: convert constant buffers to si_descriptorsMarek Olšák2013-08-311-2/+141
| | | | | | | | | | | | | | | There is a new "class" si_buffer_resources, which should be good enough for implementing any kind of buffer bindings (constant buffers, vertex buffers, streamout buffers, shader storage buffers, etc.) I don't even keep a copy of pipe_constant_buffer - we don't need it. The main motivation behind this is to have a well-tested infrastrusture for setting up streamout buffers. Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]> Tested-by: Tom Stellard <[email protected]>
* radeonsi: use r600_common_context, r600_common_screen, r600_resourceMarek Olšák2013-08-311-20/+19
| | | | | | | | | Also r600_hw_context_priv.h and si_state_streamout.c are removed, because they are no longer needed. Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]> Tested-by: Tom Stellard <[email protected]>
* radeonsi: add FMASK texture binding slots and resource setup (v2)Marek Olšák2013-08-171-1/+4
| | | | | | v2: bind FMASK textures to shader resource slots 16..31 Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: add flexible shader descriptor management and use it for sampler viewsMarek Olšák2013-08-171-0/+355
It moves all sampler view descriptors to a buffer. It supports partial resource updates and it can also unbind resources (required for FMASK texturing). The buffer contains all sampler view descriptors for one shader stage, represented as an array. On top of that, there are N arrays in the buffer, which are used to emulate context registers as implemented by the previous ASICs (each array is a context). This uses the RCU synchronization approach to avoid read-after-write hazards as discussed in the thread: "radeonsi: add FMASK texture binding slots and resource setup" CP DMA is used to clear the descriptors at context initialization and to copy the descriptors from one context to the next. v2: - use PKT3_DMA_DATA on CIK (I'll test CIK later) - turn the bool CP DMA parameters into self-explanatory flags - add a nice simple API for packet emission to radeon_winsys.h - use 256 contexts, 128 causes texture corruption in openarena
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