Commit message (Collapse) | Author | Age | Files | Lines | |
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* | radeonsi: add si_cp_copy_data | Marek Olšák | 2019-04-23 | 1 | -0/+28 |
| | | | | | Tested-by: Dieter Nützel <[email protected]> Acked-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi: don't use PFP_SYNC_ME with compute-only contexts | Marek Olšák | 2019-04-02 | 1 | -1/+1 |
| | | | | | | | | | | Compute rings don't have PFP. Fixes: a1378639ab1 "radeonsi: always use compute rings for clover on CI and newer (v2)" Reviewed-by: Samuel Pitoiset <[email protected]> Tested-by: Jan Vesely <[email protected]> Tested-by: Dieter Nützel <[email protected]> | ||||
* | radeonsi: rename rsrc -> ssrc, rdst -> sdst | Marek Olšák | 2019-01-22 | 1 | -8/+8 |
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> | ||||
* | radeonsi: rename r600_resource -> si_resource | Marek Olšák | 2019-01-22 | 1 | -9/+9 |
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> | ||||
* | radeonsi: move PKT3_WRITE_DATA generation into a helper function | Marek Olšák | 2019-01-22 | 1 | -0/+25 |
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> | ||||
* | radeonsi: don't set RAW_WAIT for CP DMA clears | Nicolai Hähnle | 2018-12-19 | 1 | -1/+2 |
| | | | | | | There is never a read-after-write hazard because the command doesn't read. Reviewed-by: Marek Olšák <[email protected]> | ||||
* | radeonsi: allow si_cp_dma_clear_buffer to clear GDS from any IB | Marek Olšák | 2018-11-28 | 1 | -24/+25 |
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> | ||||
* | radeonsi: use compute shaders for clear_buffer & copy_buffer | Marek Olšák | 2018-10-16 | 1 | -175/+5 |
| | | | | | Fast color clears should be much faster. Also, fast color clears on evicted buffers should be 200x faster on GFX8 and older. | ||||
* | radeonsi: add GDS support to CP DMA | Marek Olšák | 2018-10-16 | 1 | -21/+83 |
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* | radeonsi: split si_copy_buffer | Marek Olšák | 2018-09-10 | 1 | -11/+22 |
| | | | | | | compute and SDMA will be added into it. Tested-by: Dieter Nützel <[email protected]> | ||||
* | radeonsi: don't call VBO prefetch with size=0 | Marek Olšák | 2018-09-10 | 1 | -1/+1 |
| | | | | | | for the next commit. Tested-by: Dieter Nützel <[email protected]> | ||||
* | radeonsi: merge SI and CI dma_clear_buffer and remove the callback | Marek Olšák | 2018-09-10 | 1 | -1/+1 |
| | | | | | | | also use assertions for the requirements that offset and size are a multiple of 4. Tested-by: Dieter Nützel <[email protected]> | ||||
* | radeonsi: add a thorough clear/copy_buffer benchmark | Marek Olšák | 2018-08-29 | 1 | -3/+5 |
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* | radeonsi: add flag L2_STREAM for minimal cache usage | Marek Olšák | 2018-08-29 | 1 | -6/+10 |
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* | radeonsi: split si_clear_buffer to remove enum si_method | Marek Olšák | 2018-08-14 | 1 | -40/+48 |
| | | | | | Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> | ||||
* | radeonsi: replace CP_DMA_USE_L2 with enum si_cache_policy | Marek Olšák | 2018-08-14 | 1 | -26/+36 |
| | | | | | Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> | ||||
* | radeonsi: declare coher in si_copy_buffer | Marek Olšák | 2018-08-14 | 1 | -8/+7 |
| | | | | | Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> | ||||
* | radeonsi: make PFP_SYNC_ME an explicit CP DMA flag | Marek Olšák | 2018-08-14 | 1 | -17/+25 |
| | | | | | Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> | ||||
* | radeonsi: cosmetic changes | Marek Olšák | 2018-08-04 | 1 | -1/+1 |
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* | radeonsi: add new R600_DEBUG test "testclearbufperf" | Darren Powell | 2018-08-02 | 1 | -5/+7 |
| | | | | | Signed-off-by: Darren Powell <[email protected]> Signed-off-by: Marek Olšák <[email protected]> | ||||
* | ac: fix typo DSL_SEL -> DST_SEL | Marek Olšák | 2018-07-26 | 1 | -2/+2 |
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* | amd,radeonsi: rename radeon_winsys_cs -> radeon_cmdbuf | Marek Olšák | 2018-06-19 | 1 | -1/+1 |
| | | | | Acked-by: Bas Nieuwenhuizen <[email protected]> | ||||
* | radeonsi: use r600_resource() typecast helper | Marek Olšák | 2018-04-27 | 1 | -3/+3 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi: don't use an indirect table for state atoms | Marek Olšák | 2018-04-27 | 1 | -1/+1 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi: make sure CP DMA is idle at the end of IBs | Marek Olšák | 2018-04-13 | 1 | -1/+11 |
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* | radeonsi: always prefetch later shaders after the draw packet | Marek Olšák | 2018-04-13 | 1 | -23/+66 |
| | | | | | | | | | so that the draw is started as soon as possible. v2: only prefetch the API VS and VBO descriptors Reviewed-by: Samuel Pitoiset <[email protected]> Tested-by: Dieter Nützel <[email protected]> | ||||
* | radeonsi: remove r600_common_context | Marek Olšák | 2018-04-05 | 1 | -26/+26 |
| | | | | Acked-by: Timothy Arceri <[email protected]> | ||||
* | radeonsi: move r600_cs.h contents into si_pipe.h, si_build_pm4.h | Marek Olšák | 2018-04-05 | 1 | -1/+0 |
| | | | | Acked-by: Timothy Arceri <[email protected]> | ||||
* | radeonsi: rename a few R600/r600_ -> SI_/si_ | Marek Olšák | 2018-04-05 | 1 | -17/+17 |
| | | | | Acked-by: Timothy Arceri <[email protected]> | ||||
* | radeonsi: move definitions out of r600_pipe_common.h | Marek Olšák | 2018-04-05 | 1 | -1/+1 |
| | | | | Acked-by: Timothy Arceri <[email protected]> | ||||
* | radeonsi: use si_context instead of pipe_context in parameters pt3 | Marek Olšák | 2018-04-05 | 1 | -2/+2 |
| | | | | Acked-by: Timothy Arceri <[email protected]> | ||||
* | radeonsi: use si_context instead of pipe_context in parameters pt2 | Marek Olšák | 2018-04-05 | 1 | -5/+4 |
| | | | | Acked-by: Timothy Arceri <[email protected]> | ||||
* | radeonsi: use si_context instead of pipe_context in parameters pt1 | Marek Olšák | 2018-04-05 | 1 | -2/+2 |
| | | | | Acked-by: Timothy Arceri <[email protected]> | ||||
* | radeonsi: update copyrights | Marek Olšák | 2018-04-05 | 1 | -0/+1 |
| | | | | Acked-by: Timothy Arceri <[email protected]> | ||||
* | radeonsi: switch radeon_add_to_buffer_list parameter to si_context | Marek Olšák | 2018-04-05 | 1 | -2/+2 |
| | | | | Acked-by: Timothy Arceri <[email protected]> | ||||
* | radeonsi: flatten / remove struct r600_ring | Marek Olšák | 2018-04-05 | 1 | -5/+5 |
| | | | | Acked-by: Timothy Arceri <[email protected]> | ||||
* | radeonsi: rename si_need_cs_space -> si_need_gfx_cs_space | Marek Olšák | 2018-04-05 | 1 | -1/+1 |
| | | | | Acked-by: Timothy Arceri <[email protected]> | ||||
* | radeonsi: don't use struct si_descriptors for vertex buffer descriptors | Marek Olšák | 2018-02-26 | 1 | -3/+2 |
| | | | | | | VBO descriptor code will change a lot one day. Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi: remove r600_common_screen | Marek Olšák | 2017-11-29 | 1 | -1/+1 |
| | | | | | | | | | | Most files in gallium/radeon now include si_pipe.h. chip_class and family are now here: sscreen->info.family sscreen->info.chip_class Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi: remove some definitions and helpers from r600_pipe_common.h | Marek Olšák | 2017-11-29 | 1 | -2/+2 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi: remove r600_common_context::clear_buffer | Marek Olšák | 2017-11-29 | 1 | -1/+0 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi: move si_pipe_clear_buffer into si_cp_dma.c | Marek Olšák | 2017-11-29 | 1 | -0/+61 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi: move all clear() code into si_clear.c | Marek Olšák | 2017-11-29 | 1 | -3/+3 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi: remove 'Authors:' comments | Marek Olšák | 2017-11-02 | 1 | -3/+0 |
| | | | | | | | It's inaccurate. Instead, see the copyright and use "git log" and "git blame" to know the authorship. Acked-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi: add si_descriptors::gpu_address and remove buffer_offset | Marek Olšák | 2017-10-17 | 1 | -1/+2 |
| | | | | | | This allows us to change the pointer arbitrarily. Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi: add performance thresholds for CP DMA, decrease it for clears | Marek Olšák | 2017-10-09 | 1 | -1/+7 |
| | | | | | | The first one isn't used yet. Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | r600: fork and import gallium/radeon | Marek Olšák | 2017-09-26 | 1 | -1/+1 |
| | | | | | | | | | | | This marks the end of code sharing between r600 and radeonsi. It's getting difficult to work on radeonsi without breaking r600. A lot of functions had to be renamed to prevent linker conflicts. There are also minor cleanups. Acked-by: Dave Airlie <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi: don't prefetch VBO descriptors if vertex elements == NULL | Marek Olšák | 2017-08-21 | 1 | -0/+3 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi: prefetch VBO descriptors after the first VGT shader | Marek Olšák | 2017-08-07 | 1 | -17/+63 |
| | | | | | Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi: add a separate dirty mask for prefetches | Marek Olšák | 2017-08-07 | 1 | -8/+8 |
| | | | | | | | | | | so that we don't rely on si_pm4_state_enabled_and_changed, allowing us to move prefetches after draw calls. v2: ckear the dirty mask after unbinding shaders Tested-by: Dieter Nützel <[email protected]> (v1) Reviewed-by: Nicolai Hähnle <[email protected]> (v1) |