summaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers/radeonsi/si_cp_dma.c
Commit message (Expand)AuthorAgeFilesLines
* radeonsi: remove 'Authors:' commentsMarek Olšák2017-11-021-3/+0
* radeonsi: add si_descriptors::gpu_address and remove buffer_offsetMarek Olšák2017-10-171-1/+2
* radeonsi: add performance thresholds for CP DMA, decrease it for clearsMarek Olšák2017-10-091-1/+7
* r600: fork and import gallium/radeonMarek Olšák2017-09-261-1/+1
* radeonsi: don't prefetch VBO descriptors if vertex elements == NULLMarek Olšák2017-08-211-0/+3
* radeonsi: prefetch VBO descriptors after the first VGT shaderMarek Olšák2017-08-071-17/+63
* radeonsi: add a separate dirty mask for prefetchesMarek Olšák2017-08-071-8/+8
* radeonsi: add and use si_pm4_state_enabled_and_changedMarek Olšák2017-08-071-11/+9
* radeonsi: de-atomize L2 prefetchMarek Olšák2017-08-071-4/+3
* gallium: use "ull" number suffix to keep the QtCreator parser happyMarek Olšák2017-07-101-1/+1
* radeonsi/gfx9: use TC L2 for fast color clear with CP DMAMarek Olšák2017-06-221-2/+5
* radeonsi: disable SDMA clears and copies for sparse buffersNicolai Hähnle2017-04-051-0/+1
* radeonsi/gfx9: don't compare src_va w/ dst_va for CP_DMA_CLEARMarek Olšák2017-03-311-1/+2
* radeonsi/gfx9: CP DMA changesMarek Olšák2017-03-301-10/+30
* amd: GFX9 packet changesMarek Olšák2017-03-301-2/+2
* radeonsi: use DMA for clears with unaligned sizeNicolai Hähnle2017-03-281-19/+27
* radeonsi: CP DMA clear supports unaligned destination addressesNicolai Hähnle2017-03-281-1/+2
* radeonsi: remove the early-out for SDMA in si_clear_bufferNicolai Hähnle2017-03-281-22/+21
* radeonsi: use R600_RESOURCE_FLAG_UNMAPPABLE where it's desirableMarek Olšák2017-02-181-2/+4
* radeonsi: align vertex buffer descriptor list size for optimal prefetchMarek Olšák2017-02-101-1/+1
* radeonsi: move CP_DMA_ALIGNMENT definitionMarek Olšák2017-02-101-10/+8
* radeonsi: remove separate CB/DB_META flush flagsMarek Olšák2017-02-101-2/+1
* radeonsi: atomize the scratch buffer stateMarek Olšák2017-01-301-1/+2
* radeonsi: atomize L2 prefetchesMarek Olšák2017-01-301-0/+39
* radeonsi: skip an unnecessary mutex lock for L2 prefetchesMarek Olšák2017-01-181-5/+7
* radeonsi: si_cp_dma_prepare is a no-op for L2 prefetchesMarek Olšák2017-01-181-5/+7
* radeonsi: add SI_CPDMA_SKIP_BO_LIST_UPDATEMarek Olšák2017-01-181-10/+14
* radeonsi: add TC L2 prefetch for shaders and VBO descriptorsMarek Olšák2017-01-061-0/+12
* radeonsi: add CP DMA flags for greater control over synchronizationMarek Olšák2017-01-061-14/+23
* radeonsi: cleanly communicate which CP DMA packet is firstMarek Olšák2017-01-061-11/+21
* radeonsi: don't count fast clears and prefetches into CP DMA statsMarek Olšák2017-01-061-2/+6
* radeonsi: implement SDMA-based buffer clearing for SIMarek Olšák2017-01-051-1/+1
* radeonsi: also wait for SDMA in the clear_buffer CPU fallbackMarek Olšák2017-01-051-3/+2
* radeonsi: simplify r600_resource typecasts in si_clear_bufferMarek Olšák2017-01-051-5/+5
* radeonsi: always use SDMA for big buffer clears and first buffer usesMarek Olšák2017-01-051-0/+20
* radeonsi: add a driver query for counting CP DMA callsMarek Olšák2016-11-011-0/+4
* radeonsi: remove si_resource_create_customMarek Olšák2016-10-261-4/+3
* radeonsi: clean up CP DMA emit codeMarek Olšák2016-09-131-84/+60
* radeonsi: remove the cache_flush atomMarek Olšák2016-09-091-1/+1
* radeonsi: check IB memory usage of CP DMA operationsMarek Olšák2016-08-061-0/+5
* radeonsi: fix CP DMA hazard with index buffer fetchesMarek Olšák2016-05-311-2/+20
* radeonsi: rework clear_buffer flagsMarek Olšák2016-04-281-16/+22
* radeonsi: remove needless cache flushes at the end of CP DMA operationsMarek Olšák2016-04-281-8/+0
* radeonsi: do not do two full flushes on every compute dispatchBas Nieuwenhuizen2016-04-191-2/+4
* radeonsi: allow clearing buffers >= 4 GBMarek Olšák2016-04-121-3/+3
* gallium/radeon: remove radeon_winsys_cs_handleMarek Olšák2015-12-111-1/+1
* radeonsi: don't use the CP DMA workaround on Fiji and newerMarek Olšák2015-12-111-16/+20
* gallium/radeon: inline the r600_rings structureMarek Olšák2015-11-131-5/+5
* radeonsi: rename cache flushing flags once moreMarek Olšák2015-11-131-3/+3
* radeonsi: set the DISABLE_WR_CONFIRM flag on CI-VI as wellMarek Olšák2015-11-131-2/+2
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-16 22:42:12 +0000