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* gallium/radeon: add enum radeon_micro_modeMarek Olšák2016-11-012-5/+13
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: make it clear that DRM 2.x.x fast clear constraint is CIK-onlyMarek Olšák2016-11-011-2/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: remove r600_surface::level_infoMarek Olšák2016-11-012-3/+0
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: add radeon_surf::is_linearMarek Olšák2016-11-014-9/+10
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: remove radeon_surf_level::pitch_bytesMarek Olšák2016-11-017-27/+29
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: don't call u_format helpers if we have that info alreadyMarek Olšák2016-11-011-8/+5
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: replace radeon_surf_info::dcc_enabled with num_dcc_levelsMarek Olšák2016-11-012-8/+12
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: add a driver query for counting CP DMA callsMarek Olšák2016-11-013-0/+9
| | | | | | | CP DMA calls are synchronous with regard to shaders, but can be made asynchronous if needed. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: add a driver query for shader cache hitsMarek Olšák2016-11-013-0/+11
| | | | | | This is an 8-month old patch. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: stop using PIPE_BIND_CUSTOMMarek Olšák2016-10-263-5/+4
| | | | | | it has no effect whatsoever Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: remove unused r600_cmask_info membersMarek Olšák2016-10-262-16/+3
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: don't force the same tiling parameters for FMASKMarek Olšák2016-10-261-8/+10
| | | | | | | | | GCN can use a completely different tile mode for FMASK. FMASK allocation now skips one unrelated amdgpu_surface_init codepath as hinted by the assertion. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: print tiling index when printing texture infoMarek Olšák2016-10-261-4/+6
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: re-order radeon_surf::dcc and htile membersMarek Olšák2016-10-261-5/+5
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: rename bo_size -> surf_size, bo_alignment -> surf_alignmentMarek Olšák2016-10-264-10/+10
| | | | | | these names were misleading. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: remove flags specific to libdrm_radeon from winsys interfaceMarek Olšák2016-10-262-14/+3
| | | | | | | These just say whether libdrm can assume that the latest radeon_surface definition is used by Mesa. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: remove r600_htile_infoMarek Olšák2016-10-263-38/+21
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: remove unnecessary fields from radeon_surf_levelMarek Olšák2016-10-262-10/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: decrease the size of radeon_surfMarek Olšák2016-10-262-32/+34
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: pass pipe_resource and other params to surface_init directlyMarek Olšák2016-10-262-102/+51
| | | | | | | | | This removes input-only parameters from the radeon_surf structure. Some of the translation logic from pipe_resource to radeon_surf is moved to winsys/radeon. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeon/vce: use nblk_y instead of npix_yMarek Olšák2016-10-264-7/+7
| | | | | | | | | | | | npix_y will be removed. level[0].npix_y will be removed too. nblk_y should be the same as npix_y if the block height == 1. However, nblk_y is aligned to the tile size, so it can be greater than npix_y. If that's a problem, we'll have to save the input height of surface_init and use that. Reviewed-by: Christian König <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: define RADEON_SURF_MODE_* as enumsMarek Olšák2016-10-262-9/+14
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: stop using some input fields from radeon_surfaceMarek Olšák2016-10-261-16/+16
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: fold r600_setup_surface into r600_init_surfaceMarek Olšák2016-10-261-38/+24
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: fold radeon_winsys::surface_best into radeon/winsysMarek Olšák2016-10-262-13/+3
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: use r600_gfx_write_event_eop everywhereMarek Olšák2016-10-262-14/+7
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: make r600_gfx_write_fence more genericMarek Olšák2016-10-263-13/+32
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: fix a ZPASS comment, EVENT_WRITE_EOP fixupsMarek Olšák2016-10-262-4/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: make sure the address of separate CMASK is aligned properlyMarek Olšák2016-10-261-2/+3
| | | | | | | | This should fix random GPU hangs on Hawaii and Fiji. Cc: 11.2 12.0 13.0 <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: fix incorrect bpe use in si_set_optimal_micro_tile_modeMarek Olšák2016-10-261-7/+7
| | | | | | | | Oh my god, I wonder what catastrophic issues this was causing on SI. Cc: 13.0 <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: import all TGSI->LLVM code from gallium/radeonMarek Olšák2016-10-185-1625/+1
| | | | | | Acked-by: Nicolai Hähnle <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Acked-by: Edward O'Callaghan <[email protected]>
* gallium/radeon: simplify initialization of 64-bit gallivm buildersMarek Olšák2016-10-181-18/+4
| | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Acked-by: Edward O'Callaghan <[email protected]>
* gallium/radeon: remove unused radeon_llvm_reg_index_soaMarek Olšák2016-10-182-7/+0
| | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Acked-by: Edward O'Callaghan <[email protected]>
* radeonsi: move LLVM ALU codegen into radeonsiMarek Olšák2016-10-182-986/+2
| | | | | | Acked-by: Nicolai Hähnle <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Acked-by: Edward O'Callaghan <[email protected]>
* radeonsi: implement TC-compatible HTILEMarek Olšák2016-10-133-10/+64
| | | | | | | | | | | | | | | | | | | | | so that decompress blits aren't needed and depth texturing needs less memory bandwidth. Z16 and Z24 are promoted to Z32_FLOAT by the driver, because TC-compatible HTILE only supports Z32_FLOAT. This doubles memory footprint for Z16. The format promotion is not visible to state trackers. This is part of TC-compatible renderbuffer compression, which has 3 parts: DCC, HTILE, FMASK. Only TC-compatible FMASK compression is missing now. I don't see a measurable increase in performance though. (I tested Talos Principle and DiRT: Showdown, the latter is improved by 0.5%, which is almost noise, and it originally used layered Z16, so at least we know that Z16 promoted to Z32F isn't slower now) Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: assign a name to LLVM output variables in debug buildsNicolai Hähnle2016-10-101-1/+6
| | | | | | | This can be helpful with R600_DEBUG=preoptir. Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: avoid redundant work with overlapping in/out arraysNicolai Hähnle2016-10-101-1/+4
| | | | | Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: support ARB_compute_variable_group_sizeNicolai Hähnle2016-10-102-1/+11
| | | | | | | | Not sure if it's possible to avoid programming the block size twice (once for the userdata and once for the dispatch). Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium: add missing zero-init for resource templatesRob Clark2016-10-071-0/+1
| | | | | | | Mostly test code, plus one spot I noticed in r600. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium: add PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCKSamuel Pitoiset2016-10-071-0/+2
| | | | | | | | | v3: - use a new case statement in r600_pipe_common.c - fix compilation of softpipe... Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: implement set_device_reset_callbackNicolai Hähnle2016-10-052-0/+34
| | | | | | | | | Check for device reset on flush. It would be nicer if the kernel just reported this as an error on the submit ioctl (and similarly for fences), but this will do for now. Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: use the new parent/child pools for transfersNicolai Hähnle2016-10-053-6/+11
| | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97894 Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: optionally run the LLVM IR verifier passNicolai Hähnle2016-10-044-2/+17
| | | | | | | | This is enabled automatically if shader printing is enabled, or separately by R600_DEBUG=checkir. Catch mal-formed IR before it crashes in a later pass. Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: fix argument type of llvm.{cttz,ctlz}.i32 intrinsicsNicolai Hähnle2016-10-041-2/+2
| | | | | | Caught by R600_DEBUG=checkir (next commit). Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: unify the creation of basic blocksNicolai Hähnle2016-10-041-10/+24
| | | | | | | This changes the order of basic blocks to be equal to the order of code in the original TGSI, which is nice for making sense of shader dumps. Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: merge branch and loop flow control stacksNicolai Hähnle2016-10-042-82/+78
| | | | Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: simplify if/else/endif blocksNicolai Hähnle2016-10-042-25/+18
| | | | | | | In particular, we no longer emit an else block when there is no ELSE instruction. Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: label basic blocks by the corresponding TGSI pcNicolai Hähnle2016-10-041-0/+17
| | | | Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: cleanup and fix branch emitsNicolai Hähnle2016-10-041-37/+14
| | | | | | | | | | | | | Some of the existing code is needlessly complicated. The basic principle should be: control-flow opcodes emit branches to properly terminate the current block, _unless_ the current block already has a terminator (which happens if and only if there was a BRK or CONT). This also fixes a bug where multiple terminators were created in a block. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97887 Cc: [email protected] Reviewed-by: Marek Olšák <[email protected]>
* winsys/radeon: add buffer_get_reloc_offsetNicolai Hähnle2016-10-043-2/+14
| | | | | | | | | | | Really fix the bug that was supposed to be fixed by commits 3e7cced4b and a48bf02d: even when virtual addresses are used, the legacy relocation-based method with offsets relative to the kernel's buffer object are used for video submissions. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97969 Reviewed-by: Christian König <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
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