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* r600g,radeonsi: implement PIPE_QUERY_TIMESTAMP_DISJOINTDavid Heidelberger2014-06-101-0/+12
| | | | | | | v2 Marek: set the query result correctly Signed-off-by: David Heidelberger <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* radeon/vce: implement h264 profile supportLeo Liu2014-06-041-1/+4
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* r600g,radeonsi: disable fast clear if render condition is onMarek Olšák2014-06-031-0/+3
| | | | | | | | | | For some reason, CP DMA doesn't follow the predicate bit if I enable it, so this is the only option. This fixes piglit: spec/NV_conditional_render/clear Cc: [email protected] Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: implement SAMPLEPOS fragment shader inputMarek Olšák2014-06-023-0/+28
| | | | The sample positions are read from a constant buffer.
* radeon: add basic register setup for per-sample shadingMarek Olšák2014-06-022-1/+9
| | | | Only for Cayman, SI, CIK.
* radeon: split cayman_emit_msaa_state into 2 functionsMarek Olšák2014-06-022-12/+18
| | | | The other function will be split up from the framebuffer state.
* r600g: handle PIPE_QUERY_GPU_FINISHEDChristoph Bumiller2014-06-021-0/+9
| | | | Signed-off-by: Marek Olšák <[email protected]>
* radeon/vce: implement non-referenced framesLeo Liu2014-05-272-3/+5
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* gallium/radeon: build only a single common library libradeonEmil Velikov2014-05-151-8/+4
| | | | | | | Just fold libllvmradeon in libradeon. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: Fix anisotropic filtering state setupMichel Dänzer2014-05-141-0/+9
| | | | | | | | | | | | Bring it back in line with r600g. I broke this in the original radeonsi bringup. :( Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78537 Cc: "10.1 10.2" <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* radeon/llvm: add support for non-scalar system valuesMarek Olšák2014-05-101-0/+6
| | | | | | The sample position is one of them. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: add support for Mullins asics.Samuel Li2014-05-021-0/+7
| | | | | | | | | | | v2: name defaults to kabini for older llvm v3: fix llvm version check Signed-off-by: Samuel Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeon/compute: Implement PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCYTom Stellard2014-04-291-0/+7
| | | | | | | | | | | | Igor Gnatenko: v2: in define RADEON_INFO_MAX_SCLK use 0x1a instead of 0x19 (upstream changes) Bruno Jiménez: v3: Convert the frequency to MHz from kHz after getting it in 'do_winsys_init' Signed-off-by: Igor Gnatenko <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* r600g: fix for HTILE on R6xxMarek Olšák2014-04-251-0/+6
| | | | Reviewed-by: Alex Deucher <[email protected]>
* r600g: fix MSAA resolve on R6xx when the destination is 1D-tiledMarek Olšák2014-04-251-0/+6
| | | | | Cc: 10.0 10.1 [email protected] Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: Added Diag Handler to receive LLVM Error messagesDarren Powell2014-04-171-6/+44
| | | | Reviewed-by: Tom Stellard <[email protected]>
* r600g,radeonsi: share some of gfx flush codeMarek Olšák2014-04-162-0/+49
| | | | Reviewed-by: Christian König <[email protected]>
* r600g,radeonsi: share r600_flush_from_stMarek Olšák2014-04-161-0/+17
| | | | Reviewed-by: Christian König <[email protected]>
* radeonsi: merge si_flush with si_context_flushMarek Olšák2014-04-161-0/+4
| | | | | | This also removes si_flush_gfx_ring. Reviewed-by: Christian König <[email protected]>
* gallium/radeon: create and return a fence in the flush functionMarek Olšák2014-04-166-14/+17
| | | | | | All flush functions get a fence parameter. cs_create_fence is removed. Reviewed-by: Christian König <[email protected]>
* r600g: remove redundant r600_flush_dma_from_winsysMarek Olšák2014-04-161-8/+1
| | | | Reviewed-by: Christian König <[email protected]>
* winsys/radeon: fold cs_set_flush_callback into cs_createMarek Olšák2014-04-163-5/+5
| | | | Reviewed-by: Christian König <[email protected]>
* r600g/radeonsi: Map transfer staging texture unsynchronized when possibleMichel Dänzer2014-04-161-0/+2
| | | | | | | | | The transfer staging texture is always freshly allocated, so for write-only transfers we don't need to explicitly wait for the BO to become idle. Squeezes a few hundered MB/s more out of x11perf -shmput500 with glamor. Reviewed-by: Marek Olšák <[email protected]>
* r600g/radeonsi: Use caching buffer manager for textures as wellMichel Dänzer2014-04-151-1/+1
| | | | | | | Significantly reduces BO allocation / destruction overhead for transfers, e.g. measurable via x11perf -shm{ge,pu}t* with glamor. Reviewed-by: Marek Olšák <[email protected]>
* radeon/vce: implement B-frame supportChristian König2014-04-112-22/+53
| | | | | Signed-off-by: Slava Grigorev <[email protected]> Signed-off-by: Christian König <[email protected]>
* radeon/vce: add proper CPB backtrackChristian König2014-04-113-23/+123
| | | | | | Remember what frames we encoded at which position. Signed-off-by: Christian König <[email protected]>
* vl: add interface for H264 B-frame encodingChristian König2014-04-111-5/+6
| | | | Signed-off-by: Christian König <[email protected]>
* radeon/vce: remove RVCE_NUM_CPB_EXTRA_FRAMESChristian König2014-04-113-4/+2
| | | | | | Doesn't seems to be needed any more. Signed-off-by: Christian König <[email protected]>
* radeonsi: allow fast color clear and Hyper-Z with 1D-tiled surfaces on CIKMarek Olšák2014-04-091-5/+5
| | | | This depends on my kernel fix. Hyper-Z is still disabled by default.
* r600g,radeonsi: add a bunch of useful queries for the HUDMarek Olšák2014-04-093-1/+41
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* r600g,radeonsi: set correct initial domain for shared resourcesMarek Olšák2014-04-091-1/+1
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* Revert "radeon: just don't map VRAM buffers at all"Leo Liu2014-04-041-2/+2
| | | | | | | | | This reverts commit 96e8b916a7a39a9ba58e92d1ad77b5501de63ac7. In the case of VCE encoding with raw YUV file, CPU load directly to VRAM is faster than combination of CPU writing to GTT and then blit to VRAM with GPU. Reviewed-by: Christian König <[email protected]>
* radeon/vce: cleanup cpb handlingLeo Liu2014-04-043-11/+38
| | | | | | | v2: fix whitespace errors, minor coding style changes Signed-off-by: Leo Liu <[email protected]> Signed-off-by: Christian König <[email protected]>
* radeonsi: disable fast color clear for 1D-tiled surfaces on CIKMarek Olšák2014-03-221-0/+6
| | | | This will be re-enabled once my kernel fix lands.
* radeon: Move r600_need_dma_space to common codeNiels Ole Salscheider2014-03-202-0/+11
| | | | | Signed-off-by: Niels Ole Salscheider <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* radeon: Move DMA ring creation to common codeNiels Ole Salscheider2014-03-142-0/+32
| | | | | Signed-off-by: Niels Ole Salscheider <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* r600g,radeonsi: attempt to fix racy multi-context apps calling BufferDataMarek Olšák2014-03-111-6/+16
| | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75061 v2: minimize the window where cs_buf != new_buf
* r600g,radeonsi: fix broken buffer downloadMarek Olšák2014-03-111-1/+1
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* r600g,radeonsi: use a fallback in dma_copy instead of failingMarek Olšák2014-03-113-54/+39
| | | | | | v2: - allow byte-aligned DMA buffer copies on Evergreen - fix piglit/texsubimage regression - use the fallback for 3D copies (depth > 1) as well
* r600g, radeonsi: fix primitives-generated query with disabled streamoutMarek Olšák2014-03-113-38/+77
| | | | | | | | | | | | | | | | | Buffers are disabled by VGT_STRMOUT_BUFFER_CONFIG, but the query only works if VGT_STRMOUT_CONFIG.STREAMOUT_0_EN is enabled. This moves VGT_STRMOUT_CONFIG to its own state. The register is set to 1 if either streamout or the primitives-generated query is enabled. However, the primitives-emitted query is also incremented, so it's disabled by setting VGT_STRMOUT_BUFFER_SIZE to 0 when there is no buffer bound. This fixes piglit: ARB_transform_feedback2/counting with pause EXT_transform_feedback/primgen-query transform-feedback-disabled Reviewed-by: Michel Dänzer <[email protected]>
* r600g,radeonsi: don't add streamout.num_dw_for_end twiceMarek Olšák2014-03-111-2/+4
| | | | | | | | It's already added in need_cs_space. Also don't calculate anything if there are no buffers. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: implement fast color clearMarek Olšák2014-03-111-1/+5
| | | | | | This works for both multi-sample and single-sample color buffers. Reviewed-by: Michel Dänzer <[email protected]>
* r600g: move fast color clear code to a common placeMarek Olšák2014-03-112-4/+86
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* r600g,radeonsi: move CMASK register values from r600_surface to r600_textureMarek Olšák2014-03-113-6/+33
| | | | | | | | | | | When doing fast clear for single-sample color buffers for the first time, a CMASK buffer has to be allocated and the CMASK state in all pipe_surfaces referencing the color buffer must be updated. Updating all surfaces is kinda silly, so let's move the values to r600_texture instead. This is only for Evergreen and later. R600-R700 don't have fast clear. Reviewed-by: Michel Dänzer <[email protected]>
* r600g: move cayman MSAA setup to a common placeMarek Olšák2014-03-114-0/+260
| | | | | | I will use this in radeonsi. Reviewed-by: Michel Dänzer <[email protected]>
* r600g,radeonsi: set priorities for relocationsMarek Olšák2014-03-113-12/+17
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* r300g,uvd,vce: set priorities for relocationsMarek Olšák2014-03-113-3/+5
| | | | This updates all occurences of cs_add_reloc.
* radeon: Fix build.Vinson Lee2014-03-101-1/+1
| | | | | | | | | | | | | | | | Fix build error introduced with commit dfa25ea5cd19d5a050a1c94bd7370a2259b9f007. CC r600_streamout.lo r600_streamout.c:108:6: error: conflicting types for 'r600_set_streamout_targets' void r600_set_streamout_targets(struct pipe_context *ctx, ^ ./r600_pipe_common.h:413:6: note: previous declaration is here void r600_set_streamout_targets(struct pipe_context *ctx, ^ Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76009 Signed-off-by: Vinson Lee <[email protected]>
* gallium: allow setting of the internal stream output offsetZack Rusin2014-03-072-2/+5
| | | | | | | | | | | | | | | | D3D10 allows setting of the internal offset of a buffer, which is in general only incremented via actual stream output writes. By allowing setting of the internal offset draw_auto is capable of rendering from buffers which have not been actually streamed out to. Our interface didn't allow. This change functionally shouldn't make any difference to OpenGL where instead of an append_bitmask you just get a real array where -1 means append (like in D3D) and 0 means do not append. Signed-off-by: Zack Rusin <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeon/vce: fix memory leakChristian König2014-03-081-0/+1
| | | | | Signed-off-by: Christian König <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
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