Commit message (Collapse) | Author | Age | Files | Lines | |
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* | radeonsi: add missing initialization for userptr buffers | Nicolai Hähnle | 2017-04-14 | 1 | -0/+4 |
| | | | | | | | | | | | | | | | | Fix the accounting for memory usage of userptr buffers, which has been wrong forever (or at least for a long time). Also initialize flags. Without this initialization, the sparse buffer flag might end up being set, which leads to staging buffers being used unnecessarily (and incorrectly) in transfers to or from userptr buffers. This works around VM faults that occur with the radeon kernel module when running piglit ./bin/amd_pinned_memory decrement-offset map-buffer -auto Fixes: e077c5fe6579 ("gallium/radeon: transfers and invalidation for sparse buffers") Reported-by: Michel Dänzer <[email protected]> Reviewed-by: Marek Olšák <[email protected]> | ||||
* | gallium/radeon: never use staging buffers with AMD_pinned_memory | Nicolai Hähnle | 2017-04-13 | 1 | -2/+16 |
| | | | | | Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> | ||||
* | gallium/radeon: add HUD queries for GPU temperature and clocks | Samuel Pitoiset | 2017-04-10 | 1 | -6/+6 |
| | | | | | | | | | | | | | | | Only the Radeon kernel driver exposed the GPU temperature and the shader/memory clocks, this implements the same functionality for the AMDGPU kernel driver. These queries will return 0 if the DRM version is less than 3.10, I don't explicitely check the version here because the query codepath is already a bit messy. v2: - rebase on top of master Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]> | ||||
* | gallium/radeon: fix typo in radeon_winsys.h | Samuel Pitoiset | 2017-04-07 | 1 | -1/+1 |
| | | | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Marek Olšák <[email protected]> | ||||
* | gallium/radeon: implement pipe->resource_commit | Nicolai Hähnle | 2017-04-05 | 1 | -0/+35 |
| | | | | Reviewed-by: Marek Olšák <[email protected]> | ||||
* | gallium/radeon: transfers and invalidation for sparse buffers | Nicolai Hähnle | 2017-04-05 | 1 | -10/+24 |
| | | | | | | Sparse buffers can never be mapped by the CPU. Reviewed-by: Marek Olšák <[email protected]> | ||||
* | gallium/radeon: implement sparse buffer creation | Nicolai Hähnle | 2017-04-05 | 1 | -0/+2 |
| | | | | Reviewed-by: Marek Olšák <[email protected]> | ||||
* | radeon/winsys: add sparse buffer interface | Nicolai Hähnle | 2017-04-05 | 1 | -0/+17 |
| | | | | Reviewed-by: Marek Olšák <[email protected]> | ||||
* | gallium: decrease the size of pipe_stream_output_info - 532 -> 268 bytes | Marek Olšák | 2017-04-04 | 2 | -2/+2 |
| | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Brian Paul <[email protected]> | ||||
* | radeonsi/gfx9: allow CMASK fast clear with RB+ | Marek Olšák | 2017-03-31 | 1 | -5/+5 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: fix and enable single-sample CMASK fast clear | Marek Olšák | 2017-03-31 | 1 | -4/+4 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: fix linear mipmap CPU access | Marek Olšák | 2017-03-31 | 2 | -7/+5 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi: add tests verifying that VM faults don't hang | Marek Olšák | 2017-03-31 | 2 | -0/+6 |
| | | | | | | GFX9 hangs instead of writing VM faults to dmesg. Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi: decompress DCC in set_framebuffer_state instead of create_surface (v2) | Marek Olšák | 2017-03-31 | 2 | -6/+20 |
| | | | | | | | | for threaded gallium, which can't use pipe_context in create_surface v2: don't add a new decompress helper function Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi: fix an unused-variable warning in a release build | Marek Olšák | 2017-03-30 | 1 | -3/+1 |
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* | gallium/radeon: s/dcc_disable/disable_dcc/ | Marek Olšák | 2017-03-30 | 2 | -3/+3 |
| | | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> | ||||
* | gallium/radeon: add and use a new helper vi_dcc_enabled | Marek Olšák | 2017-03-30 | 2 | -6/+11 |
| | | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> | ||||
* | gallium/radeon: formalize that r600_query_hw_add_result doesn't need a context | Marek Olšák | 2017-03-30 | 3 | -8/+9 |
| | | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> | ||||
* | radeon/uvd: set correct vega10 db pitch alignment | Boyuan Zhang | 2017-03-30 | 1 | -4/+12 |
| | | | | | | | | Create new function to get correct alignment based on Asics, and change the corresponding decode message buffer and dpb buffer size calculations Signed-off-by: Boyuan Zhang <[email protected]> Reviewed-by: Christian König <[email protected]> | ||||
* | radeon/vce: add vce support for firmware 53.19.4 | Leo Liu | 2017-03-30 | 1 | -0/+6 |
| | | | | | | | v2: squashed with other similar commits Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]> | ||||
* | radeon/vce: adapt gfx9 surface to vce | Leo Liu | 2017-03-30 | 2 | -15/+51 |
| | | | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> | ||||
* | winsys/surface: add height pitch for gfx9 | Leo Liu | 2017-03-30 | 1 | -0/+1 |
| | | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Alex Deucher <[email protected]> | ||||
* | radeon/uvd: clear message buffer when reuse | Leo Liu | 2017-03-30 | 1 | -1/+2 |
| | | | | | | | | As required by firmware Signed-off-by: Leo Liu <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> | ||||
* | radeon/uvd: adapt gfx9 surface to uvd | Leo Liu | 2017-03-30 | 4 | -52/+98 |
| | | | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> | ||||
* | radeon/uvd: add uvd soc15 register | Leo Liu | 2017-03-30 | 2 | -4/+27 |
| | | | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> | ||||
* | radeonsi/gfx9: disable features that don't work | Marek Olšák | 2017-03-30 | 1 | -1/+7 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: add linear address computations for texture transfers | Marek Olšák | 2017-03-30 | 1 | -20/+53 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: handle pitch and offset overrides for texture_from_handle | Marek Olšák | 2017-03-30 | 1 | -11/+18 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: set/validate GFX9 BO metadata | Marek Olšák | 2017-03-30 | 2 | -1/+24 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: add radeon_surf.gfx9.surf_offset | Marek Olšák | 2017-03-30 | 2 | -1/+2 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: fix MIP0_WIDTH & MIP0_HEIGHT for compressed texture blits | Marek Olšák | 2017-03-30 | 2 | -1/+12 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: add a workaround for 1D depth textures | Marek Olšák | 2017-03-30 | 1 | -0/+8 |
| | | | | | | The same workaround is used by Vulkan. Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: DB changes | Marek Olšák | 2017-03-30 | 1 | -3/+5 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: CB changes | Marek Olšák | 2017-03-30 | 1 | -1/+2 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: do DCC clears on non-mipmapped textures only | Marek Olšák | 2017-03-30 | 1 | -4/+12 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: update can_sample_z/s flags | Marek Olšák | 2017-03-30 | 1 | -2/+7 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: pass correct parameters to buffer_get_handle | Marek Olšák | 2017-03-30 | 1 | -6/+14 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: update si_set_optimal_micro_tile_mode | Marek Olšák | 2017-03-30 | 1 | -6/+38 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: don't check array_mode for allowing TC-compatible HTILE | Marek Olšák | 2017-03-30 | 1 | -1/+2 |
| | | | | | | GFX9 supports this with all modes except linear. Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: update HTILE/CMASK/FMASK allocators | Marek Olšák | 2017-03-30 | 1 | -1/+15 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: stub testdma - array_mode_to_string | Marek Olšák | 2017-03-30 | 1 | -12/+18 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: update r600_print_texture_info | Marek Olšák | 2017-03-30 | 2 | -3/+63 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | gallium/radeon: move pre-GFX9 radeon_bo_metadata.* to u.legacy.* | Marek Olšák | 2017-03-30 | 2 | -38/+50 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | gallium/radeon: add GFX9 surface info to radeon_surf | Marek Olšák | 2017-03-30 | 1 | -0/+38 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | gallium/radeon: move pre-GFX9 radeon_surf.* members to radeon_surf.u.legacy.* | Marek Olšák | 2017-03-30 | 9 | -146/+157 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: allow Z16_UNORM for TC-compatible HTILE | Marek Olšák | 2017-03-30 | 1 | -6/+16 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: disable RB+ on Vega10 | Marek Olšák | 2017-03-30 | 3 | -7/+12 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: query changes - EVENT_WRITE and SET_PREDICATION | Marek Olšák | 2017-03-30 | 1 | -10/+19 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: EVENT_WRITE_EOP -> RELEASE_MEM | Marek Olšák | 2017-03-30 | 1 | -14/+25 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: set the LLVM processor, require LLVM 5.0 | Marek Olšák | 2017-03-30 | 1 | -0/+2 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> |