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* vl/h264: split fields into SPS/PPSChristian König2013-10-281-30/+29
| | | | | | Add alot of missing fields as well. Signed-off-by: Christian König <[email protected]>
* radeon/uvd: fix H264 chroma format handlingChristian König2013-10-281-1/+15
| | | | Signed-off-by: Christian König <[email protected]>
* r600g,radeonsi: use fences provided by the winsysMarek Olšák2013-10-251-0/+30
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* radeon: use staging for mapping linear texturesGrigori Goronzy2013-10-131-0/+6
| | | | | | | | Textures that likely reside in VRAM, are mapped for reading and don't require direct mapping should be staged into GTT, to avoid bad performance. This fixes readback performance of VDPAU surfaces. Reviewed-by: Marek Olšák <[email protected]>
* radeon/llvm: show LLVM disassembly when availableJay Cornwall2013-10-122-0/+8
| | | | | | | | With code dump enabled LLVM may generate disassembly during compilation. Show this disassembly when available and prefer it to SI bytecode dump. Reviewed-by: Tom Stellard <[email protected]> Signed-off-by: Jay Cornwall <[email protected]>
* radeon/uvd: disable VC-1 simple/main profileGrigori Goronzy2013-10-091-1/+3
| | | | | | | | It doesn't work (decodes to garbage) with most videos on UVD 3.0. Worse yet, it often results in random memory corruption or GPU hangs. Rumor has it only the newest UVD hardware could do it anyway. Reviewed-by: Christian König <[email protected]>
* radeon/uvd: try to fix VC-1 decodingGrigori Goronzy2013-10-091-33/+38
| | | | | | | | | | | | | The DPB size calculations seem to be off; there is various random corruption happening, even with advanced profile. Always assuming a minimum number of references appears to fix it, similarly to H.264. This might overallocate the DPB. Also clean up the SPS/PPS field setup so that it matches VC-1 specifications better. With these changes, all advanced profile VC-1 files I could get my hand on work fine. Reviewed-by: Christian König <[email protected]>
* radeon/uvd: fix video format reportingGrigori Goronzy2013-10-091-2/+5
| | | | | | | | | | UVD can only support NV12 in the case of hardware decoding, but we can still use all other formats for software decoding. Use the UNKNOWN profile to signal that we're not interesting in hardware decoding. v2: use profile instead of entrypoint Reviewed-by: Christian König <[email protected]>
* gallium/radeon: don't export any private symbolsMarek Olšák2013-10-081-3/+5
| | | | Reviewed-by: Tom Stellard <[email protected]>
* radeon/uvd: optimize message handling a bitChristian König2013-10-071-44/+53
| | | | | | | No need to keep a copy of the message in system memory anymore, since it should now be in GART memory on newer chips. Signed-off-by: Christian König <[email protected]>
* radeonsi/compute: Fix segfault caused by recent refactoringTom Stellard2013-10-031-0/+4
| | | | Reviewed-by: Marek Olšák <[email protected]>
* r600g: fix ínitialization of non_disp_tiling flagMarek Olšák2013-10-031-4/+5
| | | | This fixes a regression caused by e64633e8c3a5498998a45ab721bf80edca101cf5
* r600g,radeonsi: create aux_context lastMarek Olšák2013-10-031-2/+0
| | | | This fixes a regression caused by 68f6dec32ed5eede361f76c8dbdf897652659baf.
* r600/llvm: Adds support for MSAAVincent Lejeune2013-10-021-0/+1
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* r600g/llvm: fix txq for texture bufferVincent Lejeune2013-10-021-0/+1
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* gallium/radeon: drop unused variable LIBGALLIUM_LIBSEmil Velikov2013-10-011-3/+0
| | | | | Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeon: make texture logging more usefulMarek Olšák2013-09-293-22/+23
| | | | | | | This has been very useful for tracking down bugs in libdrm. The *_PRINT_TEXDEPTH environment variables were probably never used, so I removed them.
* r600g,radeonsi: share r600_texture.cMarek Olšák2013-09-294-0/+1107
| | | | | | | | | The function r600_choose_tiling is new and needs a review. The only change in functionality is that it enables 2D tiling for compressed textures on SI. It was probably accidentally turned off. v2: don't make scanout buffers linear
* r600g: move the low-level buffer functions for multiple rings to drivers/radeonMarek Olšák2013-09-292-0/+72
| | | | Also slightly optimize r600_buffer_map_sync_with_rings.
* r600g,radeonsi: consolidate tiling_info initializationMarek Olšák2013-09-292-2/+129
| | | | and the util_format_s3tc_init calls too.
* r600g: move aux_context and r600_screen_clear_buffer to drivers/radeonMarek Olšák2013-09-292-0/+32
| | | | This will be used in the next commit.
* radeonsi: move debug options to R600_DEBUGMarek Olšák2013-09-292-0/+31
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* r600g: move some debug options to drivers/radeonMarek Olšák2013-09-292-0/+33
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* r600g,radeonsi: share the async dma interfaceMarek Olšák2013-09-291-0/+10
| | | | r600_texture.c is one step closer to r600g.
* r600g,radeonsi: consolidate r600_texture structuresMarek Olšák2013-09-291-0/+25
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* r600g,radeonsi: consolidate transfer, cmask, and fmask structuresMarek Olšák2013-09-291-0/+27
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* radeon/llvm: fix TGSI_OPCODE_UCMPMarek Olšák2013-09-291-3/+7
| | | | | | | This doesn't fix any known issue (I haven't run piglit with this yet), but the code was obviously completely wrong. It looks like copy-pasted from CMP. Reviewed-by: Tom Stellard <[email protected]>
* radeon/llvm: fix shadow cube texturing for GL3.0Marek Olšák2013-09-251-23/+15
| | | | | | | | | The fix is at the end (TGSI_TEXTURE_SHADOWCUBE handling), but I also restructured the code for it to be more readable. Fixes spec/!OpenGL 3.0/sampler-cube-shadow. Reviewed-by: Michel Dänzer <[email protected]>
* radeon/uvd: try to place msg/fb buffer into GARTChristian König2013-09-251-2/+2
| | | | | | This is only supported on NI+, but the kernel takes care of those limitations. Signed-off-by: Christian König <[email protected]>
* radeon/uvd: move alignment to winsysChristian König2013-09-251-6/+0
| | | | | | | Similar to GFX and DMA. Signed-off-by: Christian König <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeon/uvd: async flush the UVD csChristian König2013-09-221-1/+1
| | | | | | | No need to block for the CS thread here. Signed-off-by: Christian König <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: fix and enable transform feedback for CIKMarek Olšák2013-09-133-27/+39
| | | | | | The CP_STRMOUT_CNTL register was moved again. Reviewed-by: Alex Deucher <[email protected]>
* radeon: don't emit streamout state if there are no streamout buffersMarek Olšák2013-09-131-0/+2
| | | | | | | This could happen if set_stream_output_targets is called twice in a row without a draw call in between. Reviewed-by: Michel Dänzer <[email protected]>
* radeon: don't emit VGT_STRMOUT_BUFFER_BASE on SIMarek Olšák2013-09-131-31/+54
| | | | | | The register doesn't exist on SI. Reviewed-by: Michel Dänzer <[email protected]>
* radeon/uvd: move more logic into the common filesChristian König2013-09-122-2/+20
| | | | | | | | Move the code back into the common UVD files since we now have base structures for R600 and radeonsi. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* radeon/uvd: use more sane defaults for bitstream buffer sizeChristian König2013-09-121-1/+3
| | | | | Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* radeon/uvd: save the aligned width & heightChristian König2013-09-021-0/+2
| | | | | | Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=68845 Signed-off-by: Christian König <[email protected]>
* radeonsi: simplify and improve flushingMarek Olšák2013-08-311-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This mimics r600g. The R600_CONTEXT_xxx flags are added to rctx->b.flags and si_emit_cache_flush emits the packets. That's it. The shared radeon code tells us when the streamout cache should be flushed, so we have to check the flags anyway. There is a new atom "cache_flush", because caches must be flushed *after* resource descriptors are changed in memory. Functional changes: * Write caches are flushed at the end of CS and read caches are flushed at its beginning. * Sampler view states are removed from si_state, they only held the flush flags. * Everytime a shader is changed, the I cache is flushed. Is this needed? Due to a hw bug, this also flushes the K cache. * The WRITE_DATA packet is changed to use TC, which fixes a rendering issue in openarena. I'm not sure how TC interacts with CP DMA, but for now it seems to work better than any other solution I tried. (BTW CIK allows us to use TC for CP DMA.) * Flush the K cache instead of the texture cache when updating resource descriptors (due to a hw bug, this also flushes the I cache). I think the K cache flush is correct here, but I'm not sure if the texture cache should be flushed too (probably not considering we use TC for WRITE_DATA, but we don't use TC for CP DMA). * The number of resource contexts is decreased to 16. With all of these cache changes, 4 doesn't work, but 8 works, which suggests I'm actually doing the right thing here and the pipeline isn't drained during flushes. Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]> Tested-by: Tom Stellard <[email protected]>
* radeonsi: use r600_common_context, r600_common_screen, r600_resourceMarek Olšák2013-08-312-1/+8
| | | | | | | | | Also r600_hw_context_priv.h and si_state_streamout.c are removed, because they are no longer needed. Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]> Tested-by: Tom Stellard <[email protected]>
* r600g: move streamout state to drivers/radeonMarek Olšák2013-08-316-0/+844
| | | | | | | | | | | | | | | | | | | | | | | | This streamout state code will be used by radeonsi. There are new structures r600_common_context and r600_common_screen. What is inherited by what is shown here: pipe_context -> r600_common_context -> r600_context pipe_screen -> r600_common_screen -> r600_screen The common structures reside in drivers/radeon. Currently they only contain enough functionality to be able to handle streamout. Eventually I'd like the whole pipe_screen implementation to be shared and some of the context stuff too. This is quite big, but most changes are because of the new structures and the fact r600_write_value is replaced by radeon_emit. Thanks to Tom Stellard for fixing the build for r600g/compute. Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]> Tested-by: Tom Stellard <[email protected]>
* radeon/uvd: fix MPEG2/4 ref frame index limitChristian König2013-08-291-2/+2
| | | | | | Otherwise the first few frames have an incorrect reference index. Signed-off-by: Christian König <[email protected]>
* vl: add entrypoint to is_video_format_supportedChristian König2013-08-192-2/+4
| | | | Signed-off-by: Christian König <[email protected]>
* vl: add entrypoint to get_video_paramChristian König2013-08-192-0/+2
| | | | Signed-off-by: Christian König <[email protected]>
* vl: rename pipe_video_decoder to pipe_video_codecChristian König2013-08-192-17/+17
| | | | Signed-off-by: Christian König <[email protected]>
* vl: rename enum pipe_video_codec to pipe_video_formatChristian König2013-08-191-19/+19
| | | | Signed-off-by: Christian König <[email protected]>
* vl: use a template for create_video_decoderChristian König2013-08-192-28/+13
| | | | Signed-off-by: Christian König <[email protected]>
* r600/radeonsi: implement new float comparison instructionsRoland Scheidegger2013-08-151-9/+40
| | | | | | | Also use ordered comparisons for old cmp instructions. Tested-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* vl: Add support for max level query v2Rico Schüller2013-08-141-0/+24
| | | | | | | | | This patch adds the level query support to the video decoders and uses some more reasonable defaults. v2: (ck) add commit message Reviewed-by: Christian König <[email protected]>
* radeon/llvm: Add missing "%s" format string to fprintf.Jon Severinsson2013-08-131-1/+1
| | | | | | | | This fixes a compilation warning with -Wformat-security. CC: "9.2" <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* tgsi: rename the TGSI fragment kill opcodesBrian Paul2013-07-121-4/+4
| | | | | | | | | | | | | | | | | | | | | TGSI_OPCODE_KIL and KILP had confusing names. The former was conditional kill (if any src component < 0). The later was unconditional kill. At one time KILP was supposed to work with NV-style condition codes/predicates but we never had that in TGSI. This patch renames both opcodes: TGSI_OPCODE_KIL -> KILL_IF (kill if src.xyzw < 0) TGSI_OPCODE_KILP -> KILL (unconditional kill) Note: I didn't just transpose the opcode names to help ensure that I didn't miss updating any code anywhere. I believe I've updated all the relevant code and comments but I'm not 100% sure that some drivers had this right in the first place. For example, the radeon driver might have llvm.AMDGPU.kill and llvm.AMDGPU.kilp mixed up. Driver authors should review their code. Reviewed-by: Jose Fonseca <[email protected]>
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