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* radeon/uvd: add h264 constrained baseline supportBoyuan Zhang2017-02-011-0/+1
| | | | | Signed-off-by: Boyuan Zhang <[email protected]> Reviewed-by: Christian König <[email protected]>
* gallium/radeon: merge dirty_fb_counter and dirty_tex_descriptor_counterMarek Olšák2017-01-302-26/+13
| | | | | | to simplify things in draw_vbo a little Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: add new HUD queries for monitoring the CPSamuel Pitoiset2017-01-304-3/+80
| | | | | | | | | | There are even more counters in the CP_STAT register but I think these ones are enough for now. v2: only read (and expose) CP_STAT on VI+ Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: add new GPU-sdma-busy HUD querySamuel Pitoiset2017-01-304-1/+21
| | | | | | | | | For simplicity, GPU-sdma-busy will return 0 on previous gens. v2: only read SRBM_STATUS2 on Evergreen+ Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: rename grbm to mmio in the gpu load pathSamuel Pitoiset2017-01-302-32/+33
| | | | | | | | We also want to monitor other MMIO counters like SRBM_STATUS2 in order to know if SDMA is busy. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: remove r600_common_context::max_dbMarek Olšák2017-01-303-20/+17
| | | | | | this cleanup is based on the vulkan driver, which seems to do the same thing Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: clean up r600_query_init_backend_maskMarek Olšák2017-01-303-20/+17
| | | | | | | This just needs to be done for r600g in the screen. We don't need an IB submission for every new context created for GCN. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: allow VRAM-only placements again on APUs & recent amdgpuMarek Olšák2017-01-301-0/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: add VRAM-vis-usage HUD querySamuel Pitoiset2017-01-263-0/+9
| | | | | | | | | | This new query returns the current visible usage of VRAM accessed by the CPU. It will return 0 on radeon because it's unimplemented. Signed-off-by: Samuel Pitoiset <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: query the CPU accessible size of VRAMSamuel Pitoiset2017-01-262-0/+2
| | | | | | | | | | R600_DEBUG="info" can be used to display that size, as well as the total amount of VRAM/GTT. Signed-off-by: Samuel Pitoiset <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: add a new HUD query for the number of mapped buffersSamuel Pitoiset2017-01-253-0/+6
| | | | | | | | | | | Useful when debugging applications which map a ton of buffers and also because we used to run into Linux's limit on the number of simultaneous mmap() calls. v2: - update the commit message Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: undef the very specific UPDATE_COUNTER macroSamuel Pitoiset2017-01-241-5/+9
| | | | | | | Also, wrap this into a do { ... } while (0). Suggested by Nicolai. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: adjust the rule for using the LINEAR_ALIGNED layoutMarek Olšák2017-01-231-1/+3
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: add HUD queries for monitoring some hw blocksSamuel Pitoiset2017-01-234-1/+110
| | | | | | | | | | | | It's also possible to monitor them via performance counters but the hardware can only use two counters simultaneously. It seems easier to re-use the existing code which reads from MMIO instead of writing a multi-pass approach. v2: - add new lines after ':' Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: refactor the GRBM counters pathSamuel Pitoiset2017-01-233-43/+47
| | | | | | | | | | This will allow to expose more queries in order to know which blocks are busy/idle. v2: - add new lines after ':' Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* android: radeon: fix LLVMInitializeAMDGPU* functions declarationMauro Rossi2017-01-181-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LLVMInitializeAMDGPU* functions need to be explicitly declared and mesa expects them via <llvm-c/Target.h> header, but LLVM needs to be instructed to invoke its own LLVM_TARGET(AMDGPU) macro, or the functions will not be available. A new llvm cflag (-DFORCE_BUILD_AMDGPU) serves this purpose, the same mechanism is used also by other llvm targets e.g. FORCE_BUILD_ARM A necessary prerequisite is to have AMDGPU target handled accordingly in llvm config files i.e. {Target,AsmParser,AsmPrinter}.def for llvm device build includes. This avoids the following building errors: external/mesa/src/gallium/drivers/radeon/radeon_llvm_emit.c:121:2: error: implicit declaration of function 'LLVMInitializeAMDGPUTargetInfo' [-Werror=implicit-function-declaration] LLVMInitializeAMDGPUTargetInfo(); ^ external/mesa/src/gallium/drivers/radeon/radeon_llvm_emit.c:122:2: error: implicit declaration of function 'LLVMInitializeAMDGPUTarget' [-Werror=implicit-function-declaration] LLVMInitializeAMDGPUTarget(); ^ external/mesa/src/gallium/drivers/radeon/radeon_llvm_emit.c:123:2: error: implicit declaration of function 'LLVMInitializeAMDGPUTargetMC' [-Werror=implicit-function-declaration] LLVMInitializeAMDGPUTargetMC(); ^ external/mesa/src/gallium/drivers/radeon/radeon_llvm_emit.c:124:2: error: implicit declaration of function 'LLVMInitializeAMDGPUAsmPrinter' [-Werror=implicit-function-declaration] LLVMInitializeAMDGPUAsmPrinter(); ^ Acked-by: Nicolai Hähnle <[email protected]> Acked-by: Emil Velikov <[email protected]>
* gallium/radeon: add GPU-shaders-busy HUD queryMarek Olšák2017-01-164-1/+31
| | | | | | | It should be close to the GPU load, but it can be much lower if something is stalling shader execution (e.g. CP DMA). Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: make the GPU load / GRBM_STATUS monitoring extensibleMarek Olšák2017-01-163-32/+53
| | | | | | The next patch will add SPI_BUSY monitoring. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: show average results per frame for perf counters in HUDMarek Olšák2017-01-161-1/+1
| | | | | | so that the graphs are independent from FPS. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: use the internal clear_buffer callback to fix r600gMarek Olšák2017-01-061-1/+3
| | | | | | | | r600g doesn't set pipe_context::clear_buffer. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99303 Reviewed-by: Alex Deucher <[email protected]>
* gallium/radeon: add new HUD query num-SDMA-IBsMarek Olšák2017-01-063-0/+6
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: rename the num-ctx-flushes query to num-GFX-IBsMarek Olšák2017-01-063-6/+6
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: add HUD queries for cache flush statsMarek Olšák2017-01-063-0/+27
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: clean up more HAVE_LLVM #ifdefsMarek Olšák2017-01-061-5/+9
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: clean up HAVE_LLVM #ifdefs in r600_get_llvm_processor_nameMarek Olšák2017-01-061-17/+11
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: turn SDMA IBs into de-facto preambles of GFX IBsMarek Olšák2017-01-051-2/+2
| | | | | | | | | | Draw calls no longer flush SDMA IBs. r600_need_dma_space is responsible for synchronizing execution between both IBs. Initial buffer clears and fast clears will stay unflushed in the SDMA IB (up to 64 MB) as long as the GFX IB isn't flushed either. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: prevent SDMA stalls by detecting RAW hazards in need_dma_spaceMarek Olšák2017-01-052-22/+27
| | | | | | | | Call r600_dma_emit_wait_idle only when there is a possibility of a read-after-write hazard. Buffers not yet used by the SDMA IB don't have to wait. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: move unrelated code from dma_emit_wait_idle to need_dma_spaceMarek Olšák2017-01-051-18/+15
| | | | | | | | r600_dma_emit_wait_idle is going away in its current form. The only difference is that the moved code is executed before DMA calls instead of after them. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use SDMA in rvid_buffer_clear on CIK-VIMarek Olšák2017-01-051-2/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use SDMA for initial clearing of DCC/CMASK/HTILE on CIK-VIMarek Olšák2017-01-053-8/+6
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: implement SDMA-based buffer clearing for CIK-VIMarek Olšák2017-01-052-0/+12
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: add Polaris12 support (v3)Junwei Zhang2016-12-212-1/+5
| | | | | | | | | | | v2: use gfxip names for llvm 4.0+ v3: use tonga for llvm <= 3.8, drop gfxip name, we can just change that we change the other asics. Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Junwei Zhang <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Acked-by: Christian König <[email protected]>
* radeon/vce Handle H.264 level 5.2Andy Furniss2016-12-051-1/+2
| | | | | | | | | Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=91281 v2: explicitly add case 52 Signed-off-by: Andy Furniss <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeonsi: apply the double EVENT_WRITE_EOP workaround to VI as wellMarek Olšák2016-12-011-2/+4
| | | | | | | | | | | | Internal docs don't mention it, but they also don't mention that the bug has been fixed (like other CI bugs fixed in VI). Vulkan does this too. v2: also update r600_gfx_write_fence_dwords Cc: 13.0 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> (v1)
* radeonsi: add a debug flag that disables optimized shader variantsMarek Olšák2016-11-232-0/+2
| | | | | Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: add RADEON_SURF_OPTIMIZE_FOR_SPACEMarek Olšák2016-11-212-0/+3
| | | | | | | | FORCE_TILING should disable it. It has no effect now, but that may change soon. Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fix r600_texture::tc_compatible_htileMarek Olšák2016-11-101-3/+3
| | | | | | | | htile_size is now always non-zero if HTILE is allocated. It seems to have caused no issues. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: add enum radeon_micro_modeMarek Olšák2016-11-012-5/+13
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: make it clear that DRM 2.x.x fast clear constraint is CIK-onlyMarek Olšák2016-11-011-2/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: remove r600_surface::level_infoMarek Olšák2016-11-012-3/+0
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: add radeon_surf::is_linearMarek Olšák2016-11-014-9/+10
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: remove radeon_surf_level::pitch_bytesMarek Olšák2016-11-017-27/+29
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: don't call u_format helpers if we have that info alreadyMarek Olšák2016-11-011-8/+5
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: replace radeon_surf_info::dcc_enabled with num_dcc_levelsMarek Olšák2016-11-012-8/+12
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: add a driver query for counting CP DMA callsMarek Olšák2016-11-013-0/+9
| | | | | | | CP DMA calls are synchronous with regard to shaders, but can be made asynchronous if needed. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: add a driver query for shader cache hitsMarek Olšák2016-11-013-0/+11
| | | | | | This is an 8-month old patch. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: stop using PIPE_BIND_CUSTOMMarek Olšák2016-10-263-5/+4
| | | | | | it has no effect whatsoever Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: remove unused r600_cmask_info membersMarek Olšák2016-10-262-16/+3
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: don't force the same tiling parameters for FMASKMarek Olšák2016-10-261-8/+10
| | | | | | | | | GCN can use a completely different tile mode for FMASK. FMASK allocation now skips one unrelated amdgpu_surface_init codepath as hinted by the assertion. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: print tiling index when printing texture infoMarek Olšák2016-10-261-4/+6
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
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