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* gallium/radeon: add basic code for setting shader return valuesMarek Olšák2016-02-212-4/+14
| | | | | | LLVMBuildInsertValue will be used on return_value. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeon/llvm: Add TargetLibraryInfo to the pass managerTom Stellard2016-02-171-1/+7
| | | | | | | | This will prevent optimization passes from introducing unsupported library calls. Tested-by: Michel Dänzer <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeon/llvm: Set the target triple on the moduleTom Stellard2016-02-172-2/+10
| | | | | Tested-by: Michel Dänzer <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* Handle removal of LLVMAddTargetData in SVN revision 260919Matthew Dawson2016-02-161-0/+6
| | | | | | | | | | | | | | | | | | | LLVM removed LLVMAddTargetData for the 3.9 release in r260919. For the two places in mesa where this is called, only enable the lines when compiling for less then 3.9. For the radeon driver, I'm not sure how to check if any other LLVM calls need to be adjusted. I think since the target data used is extracted from the LLVMModule, it isn't necessary to pass it back to LLVM again. The code does compile, and at least for radeonsi does run OpenGL games. [ Michel Dänzer: Move #if closer to LLVMAddTargetData in lp_bld_init.c, and add HAVE_LLVM < 0x0309 guards around now unused occurrences of TD and data_layout ] Signed-off-by: Matthew Dawson <[email protected]> Reviewed-and-Tested-by: Michel Dänzer <[email protected]>
* gallium/radeon: drop support for LLVM 3.5Marek Olšák2016-02-111-6/+1
| | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> v2: adjust the comment in the amdgpu winsys
* radeon/uvd: silence a warningMarek Olšák2016-02-101-0/+3
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* gallium/radeon: add a function for adding llvm function attributesMarek Olšák2016-02-092-4/+10
| | | | | | This will be used for setting the new InitialPSInputAddr attribute. Reviewed-by: Nicolai Hähnle <[email protected]>
* r600g: Ignore format for PIPE_BUFFER targetsJan Vesely2016-02-051-1/+1
| | | | | | | | Fixes compute since 7dd31b81fee7fe40bd09cf3fbc324fcc32782479 gallium/radeon: support PIPE_CAP_SURFACE_REINTERPRET_BLOCKS Signed-off-by: Jan Vesely <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* gallium/radeon: implement query_memory_info (v2)Marek Olšák2016-02-051-0/+37
| | | | | | | v2: don't use DIV_ROUND_UP (no so useful) also return eviction stats Reviewed-by: Alex Deucher <[email protected]>
* gallium/radeon: remove radeon_info::r600_tiling_configMarek Olšák2016-02-052-2/+0
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: get pipe_interleave_bytes AKA group_bytes from the winsysMarek Olšák2016-02-054-64/+5
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: set num_banks in the winsysMarek Olšák2016-02-053-26/+2
| | | | | | | amdgpu doesn't have to set this, because radeonsi gets it from tile mode arrays by default. Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: just get num_tile_pipes from the winsysMarek Olšák2016-02-053-38/+3
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: rename & reorder members of radeon_infoMarek Olšák2016-02-055-52/+60
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: re-order the SQ_xx performance counter blocksNicolai Hähnle2016-02-052-39/+21
| | | | | | | | This is yet another change motivated by appeasing AMD GPUPerfStudio's hardcoding of performance counter group numbers. Reviewed-by: Edward O'Callaghan <[email protected]> Acked-by: Marek Olšák <[email protected]>
* gallium/radeon: add GPIN driver query groupNicolai Hähnle2016-02-052-3/+87
| | | | | | | | | This group was used by older versions of AMD GPUPerfStudio (via AMD_performance_monitor) to identify the GPU family, and GPUPerfStudio still complains when it isn't available. Reviewed-by: Edward O'Callaghan <[email protected]> Acked-by: Marek Olšák <[email protected]>
* radeonsi: Allow dumping LLVM IR before optimization passesNicolai Hähnle2016-02-052-0/+2
| | | | | | | | | | | | | | Set R600_DEBUG=preoptir to dump the LLVM IR before optimization passes, to allow diagnosing problems caused by optimization passes. Note that in order to compile the resulting IR with llc, you will first have to run at least the mem2reg pass, e.g. opt -mem2reg -S < shader.ll | llc -march=amdgcn -mcpu=bonaire Signed-off-by: Michel Dänzer <[email protected]> (original patch) Signed-off-by: Nicolai Hähnle <[email protected]> (w/ debug flag) Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: emit LLVM `ret void` before radeon_llvm_finalize_moduleNicolai Hähnle2016-02-051-3/+1
| | | | | | | This allows dumping a consumable LLVM module before the initial optimization passes are run. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: implement PK2H and UP2H opcodesMarek Olšák2016-02-041-0/+72
| | | | | | | | | | | Based on a gallivm patch by Ilia Mirkin. +8 piglit regressions due to precision issues (I blame the tests) The benefit is that we'll get v_cvt_f32_f16 and v_cvt_f16_f32 instead of emulation with integer instructions. They are GLSL 4.00 intrinsics. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: fix Hyper-Z on StoneyMarek Olšák2016-02-041-0/+4
| | | | | Cc: 11.0 11.1 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: support PIPE_CAP_SURFACE_REINTERPRET_BLOCKSNicolai Hähnle2016-02-031-3/+23
| | | | | | | | | This is already used internally in si_resource_copy_region for compressed textures, so the only real change here is the adjusted surface size computation. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* radeonsi: rework RB+ for StoneyMarek Olšák2016-02-022-6/+2
| | | | | | | | | | | | | | | This fixes it. States which also need to be taken into account: - SPI color formats - each down-conversion format supports only a limited set of SPI formats - whether MSAA resolving and logic op are enabled These need special handling: - blending - disabled channels Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: Add option for SI schedulerAxel Davy2016-01-282-0/+2
| | | | | | | | | | Add a debug option to select the LLVM SI Machine Scheduler. R600_DEBUG=sisched Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* r600,compute: Plug few memory leaksJan Vesely2016-01-262-0/+23
| | | | | | | | | | | v2: drop inline keyword drop radeon_llvm_dispose_kernel_module wrapper v3: move definitions to .c file use in radeonsi Signed-off-by: Jan Vesely <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* radeonsi: change LLVM intrinsics for BREV, CLAMP, EX2Marek Olšák2016-01-221-3/+6
| | | | | | | Requested by Matt Arsenault. Reviewed-by: Tom Stellard <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: rename max_compute_units -> num_good_compute_unitsMarek Olšák2016-01-222-3/+3
| | | | | | radeon sets this correctly, but not amdgpu Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use all SPI color formatsMarek Olšák2016-01-221-1/+5
| | | | | | | | | because not using SPI_SHADER_32_ABGR doubles fill rate. We should also get optimal performance if alpha isn't needed or blending isn't enabled. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use SPI_SHADER_COL_FORMAT fields instead of export_16bpcMarek Olšák2016-01-221-0/+1
| | | | | | | | | | | | | This does change the behavior slightly: If a shader writes COLOR[i] and that color buffer isn't bound, the shader will export MRT_NULL instead and discard the IR tree that calculates the output. The only exception is alpha-to-coverage, which requires an alpha export. v2: - update a comment about 16BPC - account for MRTZ when when fixing alpha-test/kill Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: Rename do_invalidate_resource to invalidate_bufferMichel Dänzer2016-01-181-4/+6
| | | | | | | And only call it from r600_invalidate_resource for buffer resources. Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: do not reallocate user memory buffersNicolai Hähnle2016-01-142-8/+31
| | | | | | | | | The whole point of AMD_pinned_memory is that applications don't have to map buffers via OpenGL - but they're still allowed to, so make sure we don't break the link between buffer object and user memory unless explicitly instructed to. Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: implement PIPE_CAP_INVALIDATE_BUFFERNicolai Hähnle2016-01-143-7/+20
| | | | Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: reset valid_buffer_range on PIPE_TRANSFER_DISCARD_WHOLE_RESOURCENicolai Hähnle2016-01-141-0/+3
| | | | | | | This accomodates a streaming pattern where the discard flag is set when the application wraps back to the beginning of the buffer. Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: dump LLVM module outside of radeon_llvm_compileMarek Olšák2016-01-032-4/+3
| | | | | Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: always add +DumpCode to the LLVM target machine for LLVM <= 3.5Marek Olšák2016-01-032-4/+3
| | | | | | | It's the same behavior that we use for later LLVM. Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: r600_can_dump_shader should get TGSI processor type directlyMarek Olšák2016-01-032-7/+3
| | | | | Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: send LLVM diagnostics as debug messagesNicolai Hähnle2016-01-021-15/+46
| | | | | | | | | | | | | Diagnostics sent during code generation and the every error message reported by LLVMTargetMachineEmitToMemoryBuffer are disjoint reporting mechanisms. We take care of both and also send an explicit message indicating failure at the end, so that log parsers can more easily tell the boundary between shader compiles. Removed an fprintf that could never be triggered. Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: pass pipe_debug_callback into radeon_llvm_compile (v2)Nicolai Hähnle2016-01-022-3/+7
| | | | | | | This will allow us to send shader debug info via the context's debug callback. Reviewed-by: Edward O'Callaghan <[email protected]> (v1) Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: implement set_debug_callbackNicolai Hähnle2016-01-022-0/+14
| | | | | Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* u_upload_mgr: allow specifying PIPE_USAGE_* for the upload bufferMarek Olšák2016-01-021-1/+1
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* u_upload_mgr: remove alignment parameter from u_upload_createMarek Olšák2016-01-021-1/+1
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* u_upload_mgr: pass alignment to u_upload_alloc manuallyMarek Olšák2016-01-022-2/+2
| | | | | | | | | | The fixed alignment of u_upload_mgr will go away. This is the first step. The motivation is that one u_upload_mgr can have multiple users, each allocating from the same buffer, but requiring a different alignment. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: fix regression in a number of driver queriesNicolai Hähnle2015-12-211-3/+3
| | | | | | | | This rather silly mistake was introduced by commit 01910676. Cc: "11.1" <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: only dispose locally created target machine in ↵Nicolai Hähnle2015-12-181-2/+3
| | | | | | | | | radeon_llvm_compile Unify the cleanup paths of the function rather than duplicating code. Cc: "11.0 11.1" <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* configure.ac: use pkg-config for libelfJonathan Gray2015-12-171-2/+3
| | | | | | | | | | | | | Use PKG_CHECK_MODULES to get the flags to link libelf v2: keep AC_CHECK_LIB as a fallback for elfutils provided libelf that doesn't install a pkg-config file. Signed-off-by: Jonathan Gray <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Tested-by: Michel Dänzer <[email protected]> Cc: "11.0 11.1" <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* gallium/radeon: remove unnecessary test in r600_pc_query_add_resultNicolai Hähnle2015-12-151-3/+0
| | | | | | | This test is a left-over of the initial development. It is unneeded and misleading, so let's get rid of it. Reviewed-by: Edward O'Callaghan <[email protected]>
* gallium/radeon: remove radeon_winsys_cs_handleMarek Olšák2015-12-1115-69/+60
| | | | | | | | "radeon_winsys_cs_handle *cs_buf" is now equivalent to "pb_buffer *buf". Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: implement fast stencil clearMarek Olšák2015-12-111-0/+2
| | | | Reviewed-by: Alex Deucher <[email protected]>
* gallium/radeon: fix Hyper-Z hangs by programming PA_SC_MODE_CNTL_1 correctlyMarek Olšák2015-12-112-3/+11
| | | | | | | | | | This is the recommended setting according to hw people and it makes Hyper-Z stable. Just the two magic states. This fixes Evergreen, Cayman, SI, CI, VI (using the Cayman code). Cc: 11.0 11.1 <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: implement RB+ for Stoney (v2)Marek Olšák2015-12-113-0/+10
| | | | | | v2: fix dual source blending Reviewed-by: Alex Deucher <[email protected]>
* Revert "radeonsi: disable DCC on Stoney"Marek Olšák2015-12-111-4/+0
| | | | | | | | | | | This reverts commit 32f05fadbbdf2a3fb60055e610bbbdcd82dd3ce5. It turned out the problem with Stoney was caused by incorrect handling of a non-power-two VRAM size in the kernel driver. This is an optional BIOS setting and can be worked around by choosing a different VRAM size in the BIOS. Cc: 11.1 <[email protected]>
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