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	Commit message (Expand)	Author	Age	Files	Lines
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*	radeon/llvm: Lower RETFLAG DAG Node to S_ENDPGM on SI	Tom Stellard	2012-08-23	3	-8/+12
*	radeon/llvm: Add AsmPrinter	Tom Stellard	2012-08-23	8	-0/+193
*	radeon/llvm: Mark JUMP as a pseudo instruction	Tom Stellard	2012-08-23	1	-1/+1
*	radeon/llvm: Remove the last uses of MachineOperand flags	Tom Stellard	2012-08-23	2	-8/+27
*	radeon/llvm: Add flag operand to some instructions	Tom Stellard	2012-08-23	7	-33/+97
*	radeon/llvm: Encapsulate setting of MachineOperand flags	Tom Stellard	2012-08-23	4	-50/+71
*	radeon/llvm: ExpandSpecialInstrs - Add support for cube instructions	Tom Stellard	2012-08-21	4	-63/+100
*	radeon/llvm: ExpandSpecialInstrs - Add support for vector instructions	Tom Stellard	2012-08-21	2	-15/+30
*	radeon/llvm: Add R600ExpandSpecialInstrs pass	Tom Stellard	2012-08-21	6	-14/+112
*	radeon/llvm: Add helper function for getting sub reg indices	Tom Stellard	2012-08-21	3	-6/+19
*	radeon-llvm: Start multithreaded before using llvm.	Mathias Fröhlich	2012-08-20	1	-0/+15
*	radeon/llvm: Lower implicit parameters before ISel	Tom Stellard	2012-08-16	3	-69/+42
*	radeon/llvm: Enable if-cvt	Vincent Lejeune	2012-08-15	1	-0/+3
*	radeon/llvm: Add callbacks needed by if-cvt	Vincent Lejeune	2012-08-15	2	-2/+151
*	radeon/llvm: Lower branch/branch_cond into predicated jump	Vincent Lejeune	2012-08-15	7	-145/+278
*	radeon/llvm: Add a predicated JUMP instruction	Vincent Lejeune	2012-08-15	1	-0/+9
*	radeon/llvm: Support for predicate bit	Vincent Lejeune	2012-08-15	8	-13/+125
*	radeon/llvm: add support to fetch temps as vectors	Christian König	2012-08-15	1	-1/+11
*	radeon/llvm: Remove AMDGPUUtil.cpp	Tom Stellard	2012-08-15	8	-81/+22
*	radeon/llvm: Cleanup AMDGPUUtil.cpp	Apostolos Bartziokas	2012-08-15	6	-119/+95
*	radeon/llvm: Lower loads from USE_SGPR adddress space during DAG lowering	Tom Stellard	2012-08-15	5	-66/+50
*	radeon/llvm: Add live-in registers during DAG lowering	Tom Stellard	2012-08-15	8	-64/+79
*	radeon/llvm: Lower store_output intrinsic during DAG lowering	Tom Stellard	2012-08-15	3	-22/+22
*	radeon/llvm: Force VTX_READ instructions to use same reg for src and dst	Tom Stellard	2012-08-15	1	-0/+14
*	radeon/llvm: Inline immediate offset when lowering implicit parameters	Tom Stellard	2012-08-14	1	-4/+8
*	radeon/llvm: Use correct opcocde for BREAK_LOGICALNZ_i32	Tom Stellard	2012-08-14	1	-1/+4
*	radeon/llvm: Add $(LLVM_LDFLAGS) to the loader linker flags	Tom Stellard	2012-08-02	1	-1/+1
*	radeon/llvm: Add support for more f32 CMP instructions on SI	Tom Stellard	2012-08-02	1	-5/+15
*	radeon/llvm: Add support for fneg on SI	Tom Stellard	2012-08-02	2	-0/+16
*	radeon/llvm: Add support for fp_to_sint on SI	Tom Stellard	2012-08-02	1	-1/+3
*	radeon/llvm: Remove CMOVLOG DAG node	Tom Stellard	2012-08-02	6	-75/+9
*	radeonsi: Handle TGSI DIV opcode.	Michel Dänzer	2012-08-02	1	-0/+5
*	radeon/llvm: fix fp immediates on SI	Christian König	2012-08-02	1	-7/+20
*	radeon/llvm: fix calculation of max register number	Christian König	2012-08-01	1	-1/+1
*	radeon/llvm: Add pseudo-support for 64-bit immediate types on SI	Tom Stellard	2012-07-31	2	-0/+23
*	radeon/llvm: Fix incorrect return value in SelectADDRReg()	Tom Stellard	2012-07-31	1	-1/+1
*	radeon/llvm: Move SMRD IMM pattern before SMRD SGPR pattern	Tom Stellard	2012-07-31	1	-7/+6
*	radeon/llvm: Cleanup AMDIL.h	Tom Stellard	2012-07-30	4	-91/+26
*	radeon/llvm: Rename all AMDIL* classes to AMDGPU*	Tom Stellard	2012-07-30	30	-496/+496
*	radeon/llvm: Merge AMDILSubtarget into AMDGPUSubtarget	Tom Stellard	2012-07-30	25	-324/+156
*	radeon/llvm: Merge AMDILTargetLowering class into AMDGPUTargetLowering	Tom Stellard	2012-07-30	11	-241/+144
*	radeon/llvm: Remove IL_cmp DAG node	Tom Stellard	2012-07-30	4	-502/+2
*	radeon/llvm: Cleanup and reorganize AMDIL .td files	Tom Stellard	2012-07-30	13	-2303/+335
*	radeon/llvm: Remove lowering code for unsupported features	Tom Stellard	2012-07-30	8	-805/+50
*	radeon/llvm: Remove AMDILVersion.td	Tom Stellard	2012-07-30	2	-59/+0
*	radeon/llvm: Remove AMDILAlgorithms.tpp	Tom Stellard	2012-07-30	2	-94/+19
*	radeon/llvm: Merge AMDILInstrInfo.cpp into AMDGPUInstrInfo.cpp	Tom Stellard	2012-07-30	12	-693/+512
*	radeon/llvm: Merge AMDILRegisterInfo into AMDGPURegisterInfo	Tom Stellard	2012-07-30	12	-283/+69
*	radeon/llvm: Change the tablegen target from AMDIL to AMDGPU	Tom Stellard	2012-07-30	14	-107/+119
*	radeon/llvm: Add instruction defs for branches on SI	Tom Stellard	2012-07-27	3	-17/+126